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參數(shù)資料
| 型號(hào)： | ADAU1966WBSTZRL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 10/52頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 24BIT DIFF 80LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | I²C，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 16 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 511mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 16 電壓，單極 |
| 采樣率（每秒）： | * |
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ADAU1966
Data Sheet
Rev. D | Page 18 of 52
AD0
AD1
0
1
0
R/W
0
1
SCL
SDA
SCL
(CONTINUED)
SDA
(CONTINUED)
START BY
MASTER (S)
ACK. BY
ADAU1966 (AS)
ACK. BY
ADAU1966 (AS)
ACK. BY
ADAU1966 (AS)
STOP BY
MASTER (P)
FRAME 1
CHIP ADDRESS BYTE
FRAME 2
REGISTER ADDRESS BYTE
FRAME 3
DATA BYTE TO ADAU1966
D7
D6
D5
D4
D3
D2
D1
D0
09434-
012
Figure 12. I2C Write Format
SCL
FRAME 4
REGISTER DATA
FRAME 3
CHIP ADDRESS BYTE
ACK. BY
MASTER (AM)
ACK. BY
ADAU1966 (AS)
REPEATED START
BY MASTER (S)
STOP BY
MASTER (P)
SCL
(CONTINUED)
SDA
(CONTINUED)
START BY
MASTER (S)
ACK. BY
ADAU1966 (AS)
ACK. BY
ADAU1966 (AS)
FRAME 1
CHIP ADDRESS BYTE
FRAME 2
REGISTER ADDRESS BYTE
0
1
0
R/W
0
1
AD0
AD1
AD0
AD1
SDA
D7
0
1
0
D6
D5
D4
D3
D2
D1
D0
R/W
09434-
013
Figure 13. I2C Read Format
Table 16. I2C Abbreviations
Abbreviation
Condition
S
Start bit
P
Stop bit
AM
Acknowledge by master
AS
Acknowledge by slave
Table 17. Single Word I2C Write
S
Chip Address, R/W = 0
AS
Register Address
AS
Data-Word
AS
P
Table 18. Burst Mode I2C Write
S
Chip Address, R/W = 0
AS
Register Address
AS
Data-Word 1
AS
Data-Word 2
AS
Data-Word N
AS
P
Table 19. Single Word I2C Read
S
Chip Address, R/W = 0
AS
Register Address
AS
S
Chip Address, R/W = 1
AS
Data-Word
AM
P
Table 20. Burst Mode I2C Read
S
Chip Address,
R/W = 0
AS
Register
Address
AS
S
Chip Address,
R/W = 1
AS
Data-
Word 1
AM
Data-
Word 2
AM
Data-
Word N
AM
P
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