tCCH
參數(shù)資料
型號: ADAU1966WBSTZRL
廠商: Analog Devices Inc
文件頁數(shù): 13/52頁
文件大?。?/td> 0K
描述: IC DAC 24BIT DIFF 80LQFP
標(biāo)準(zhǔn)包裝: 1,000
位數(shù): 24
數(shù)據(jù)接口: I²C,串行,SPI?
轉(zhuǎn)換器數(shù)目: 16
電壓電源: 模擬和數(shù)字
功率耗散(最大): 511mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 16 電壓,單極
采樣率(每秒): *
ADAU1966
Data Sheet
Rev. D | Page 20 of 52
D0
D8
D22
D23
D9
CLATCH
CCLK
CDATA
COUT
tCCH tCCL
tCDS tCDH
tCLS
tCCP
tCLH
tCOTS
tCOD
tCOE
09434-
1
17
Figure 17. Format of the SPI Signal
POWER SUPPLY AND VOLTAGE REFERENCE
The ADAU1966 is designed for 5 V analog and 2.5 V digital
supplies. To minimize noise pickup, bypass the power supply
pins with 100 nF ceramic chip capacitors placed as close to the
pins as possible. Also, provide a bulk aluminum electrolytic
capacitor of at least 22 μF for each rail on the same PC board as
the codec. It is important that the analog supply be as clean as
possible.
The ADAU1966 includes a 2.5 V regulator driver that requires
only an external pass transistor and bypass capacitors to make a
2.5 V regulator from a 5 V supply. The VSUPPLY and VSENSE
pins must be decoupled with no more than 10 F, in parallel
with 100 nF high frequency bypassing. If the regulator driver is
not used, connect VSUPPLY and VDRIVE to GND and leave
VSENSE unconnected.
All digital inputs are compatible with TTL and CMOS levels.
All outputs are driven from the 3.3 V or 5 V IOVDD supply and
are compatible with TTL and 3.3 V CMOS levels.
The temperature sensor internal voltage reference (VTS_REF) is
brought out on the TS_REF pin and must be bypassed as close
as possible to the chip with a parallel combination of 10 μF and
100 nF.
The internal band gap reference can be disabled in the
PLL_CLK_CTRL1 register by setting VREF_EN to 0; the CM
pin can be then be driven from an external source. This can be
used to scale the DAC output to the clipping level of a power
amplifier based on its power supply voltage.
The CM pin is the internal common-mode reference. It must
be bypassed as close as possible to the chip, with a parallel
combination of 10 μF and 100 nF. This voltage can be used to
bias external op amps to the common-mode voltage of the analog
input and output signal pins. It is recommended that the CM
pin be isolated from the external circuitry by using a high quality
buffer to provide a quiet, low impedance source for the external
circuitry. Use of a quiet op amp is critical, because any noise
added to the reference voltage is injected into the signal path.
SERIAL DATA PORTS—DATA FORMAT
The 16 DAC channels use a common serial bit clock (DBCLK)
and a common left-right framing clock (DLRCLK) in the serial
data port. The clock signals are all synchronous with the sample
rate. The normal stereo serial modes are shown in Figure 18.
The DAC serial data mode defaults to I2S (1 BCLK delay) upon
power-up and reset. The ports can also be programmed for left-
justified and right-justified (24-bit and 16-bit) operation using
DAC_CTRL0[7:6]. Stereo and TDM modes can be selected using
DAC_CTRL0[5:3]. The polarity of the DLRCLK pin is pro-
grammable according to the DAC_CTRL1[5] bit, allowing
for easy channel swapping.
The DBCLK pin can latch on the rising or falling edge of the
clock signal. DAC_CTRL1[1] selects the active edge.
The serial ports are programmable as the clock masters according
to the DAC_CTRL1[0] bit. By default, the serial port is in slave
mode.
TIME-DIVISION MULTIPLEXED (TDM) MODES
The ADAU1966 serial ports also have several different TDM
serial data modes. The ADAU1966 can support a single data line
TDM16, a dual data line (TDM8), a quad data line (TDM4), or
eight data lines (TDM2). The DLRCLK can be operated in both
single-cycle pulse mode and a 50% duty cycle mode. Both
16 DBCLKs or 32 DBCLKs per channel are selectable for
each mode.
The I/O pins of the serial ports are defined according to the
serial mode that is selected. For a detailed description of the
function of each pin in TDM and stereo modes, see Table 22.
TEMPERATURE SENSOR
The ADAU1966 has an on-board temperature sensor that allows
the user to read the temperature of the silicon inside the part.
The temperature sensor readout has a range of 60°C to +140°C
in 1°C steps. The PDN_THRMSENS_CTRL_1 register controls
the settings of the sensor. The temperature sensor is powered on
by default and can be shut off by setting the TS_PDN[2] bit to
b1 in PDN_THRMSENS_CTRL_1. The temperature sensor can
be run in either continuous operation or one-shot mode. The
temperature sensor conversion mode is modified using Bit 5,
THRM_MODE; the default is THRM_MODE = 1, one-shot
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