參數(shù)資料
型號: AD9518-0A/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 14/64頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR AD9518-0A
設(shè)計資源: AD9518 Eval Brd Schematics
AD9518 Gerber Files
AD9518-0 BOM
標(biāo)準(zhǔn)包裝: 1
主要目的: 計時,時鐘發(fā)生器
嵌入式:
已用 IC / 零件: AD9518-0A
主要屬性: 2 輸入,6 輸出,2.8GHz VCO
次要屬性: LVPECL 輸出邏輯
已供物品:
Data Sheet
AD9518-0
Rev. C | Page 21 of 64
DETAILED BLOCK DIAGRAM
PROGRAMMABLE
N DELAY
REFIN (REF1)
REFIN (REF2)
CLK
REF1
REF2
AD9518-0
STATUS
R
DIVIDER
VCO STATUS
PROGRAMMABLE
R DELAY
REFERENCE
SWITCHOVER
REF_ SEL
CPRSET VCP
VS
GND
RSET
DISTRIBUTION
REFERENCE
REFMON
CP
STATUS
LD
P, P + 1
PRESCALER
A/B
COUNTERS
N DIVIDER
BYPASS
LF
LOW DROPOUT
REGULATOR (LDO)
VCO
PHASE
FREQUENCY
DETECTOR
LOCK
DETECT
CHARGE
PUMP
PL
L
RE
F
E
RE
NCE
HOLD
OUT0
OUT1
OUT0
OUT1
LVPECL
DIVIDE BY
1 TO 32
OUT2
OUT3
OUT2
OUT3
LVPECL
DIVIDE BY
1 TO 32
OUT4
OUT5
OUT4
OUT5
LVPECL
DIVIDE BY
1 TO 32
0
1
DIVIDE BY
2, 3, 4, 5, OR 6
PD
SYNC
RESET
SCLK
SDIO
SDO
CS
DIGITAL
LOGIC
SERIAL
CONTROL
PORT
06
42
9-
00
2
Figure 27. Detailed Block Diagram
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