參數(shù)資料
型號(hào)： AD5590BBCZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 33/44頁(yè)
文件大?。?/td> 0K
描述： IC ADC I/O PORT-16 AMP 80-CSPBGA
標(biāo)準(zhǔn)包裝： 1
位數(shù)： 12
采樣率（每秒）： 1M
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 12.5mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 80-CSP-BGA（10x10）
包裝： 托盤
輸入數(shù)目和類型： 16 個(gè)單端，單極
產(chǎn)品目錄頁(yè)面： 777 (CN2011-ZH PDF)
AD5590
Rev. A | Page 39 of 44
ADC Shadow Register
The shadow register on the ADC is a 16-bit, write-only register.
Data is loaded from the ADIN pin of the ADC on the falling
edge of ASCLK. The data is transferred on the ADIN line at the
same time as a conversion result is read from the ADC. This
requires 16 serial falling edges for the data transfer. The infor-
mation is clocked into the shadow register, provided that the
SEQ and shadow bits were set to 0 and 1, respectively, in the
previous write to the control register. MSB denotes the first bit
in the data stream. Each bit represents an analog input from
Channel 0 through to Channel 15. A sequence of channels can
be selected through which the ADC cycles with each consecutive
ASYNC falling edge after the write to the shadow register. To
select a sequence of channels, the associated channel bit must
be set for each analog input. The ADC continuously cycles
through the selected channels in ascending order, beginning
with the lowest channel, until a write operation occurs (that is,
the write bit is set to 1) with the SEQ and shadow bits
configured in any way except 1, 0 (see Table 25). The bit
functions are outlined in Table 26.
Figure 69 reflects the normal operation of a multichannel ADC,
where each serial transfer selects the next channel for conversion.
In this mode of operation, the sequencer function is not used.
Figure 70 shows how to program the ADC to continuously
convert on a particular sequence of channels. To exit this mode
of operation and revert back to the normal mode of operation
of a multichannel ADC (as outlined in Figure 69), ensure the
write bit = 1 and the SEQ = shadow = 0 on the next serial
transfer.
Figure 71 shows how a sequence of consecutive channels can
be converted without having to program the shadow register
or write to the ADC on each serial transfer. Again, to exit this
mode of operation and revert back to the normal mode of
operation of a multichannel ADC (as outlined in Figure 69),
ensure the write bit = 1 and the SEQ = shadow = 0 on
the next serial transfer.
ADOUT: CONVERSION RESULT FROM
PREVIOUSLY SELECTED CHANNEL ADD3 TO
CHANNEL ADD0
ADIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE
SELECT CHANNEL ADD3 TO CHANNEL ADD0
FOR CONVERSION, SEQ = SHADOW = 0
ADIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE
SELECT CHANNEL ADD3 TO CHANNEL ADD0
FOR CONVERSION,
SEQ = SHADOW = 0
DUMMY CONVERSIONS
ADIN = ALL 1s
ASYNC
WRITE BIT = 1,
SEQ = SHADOW = 0
POWER ON
076
91-
069
Figure 69. Sequence Function Not Used
DUMMY CONVERSIONS
ADIN = ALL 1s
ADIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE
SELECT CHANNEL ADD3 TO CHANNEL ADD0
FOR CONVERSION, SEQ = 0 SHADOW = 1
ASYNC
ADOUT: CONVERSION RESULT FROM
PREVIOUSLY SELECTED CHANNEL ADD3 TO
CHANNEL ADD0
ADIN: WRITE TO SHADOW REGISTER,
SELECTING WHICH CHANNELS TO CONVERT
ON; CHANNELS SELECTED NEED NOT BE
CONSECUTIVE
POWER ON
CONTINUOUSLY
CONVERTS ON THE
SELECTED SEQUENCE
OF CHANNELS
CONTINUOUSLY
CONVERTS ON THE
SELECTED SEQUENCE
OF CHANNELS BUT
ALLOWS RANGE,
CODING, AND SO ON,
TO CHANGE IN THE
CONTROL REGISTER
WITHOUT
INTERRUPTING THE
SEQUENCE PROVIDED,
SEQ = 1 SHADOW = 0
WRITE BIT = 0
WRITE
BIT = 0
WRITE BIT = 1,
SEQ = 1, SHADOW = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
07
69
1-
07
0
Figure 70. Continuous Conversions
CONTINUOUSLY CONVERTS ON THE
SELECTED SEQUENCE OF CHANNELS BUT
ALLOWS RANGE, CODING, AND SO ON, TO
CHANGE IN THE CONTROL REGISTER
WITHOUT INTERRUPTING THE SEQUENCE
PROVIDED, SEQ = 1, SHADOW = 0
DUMMY CONVERSIONS
ADIN = ALL 1s
ADIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE
SELECT CHANNEL ADD3 TO CHANNEL ADD0
FOR CONVERSION, SEQ = 1 SHADOW = 1
ASYNC
ADOUT: CONVERSION RESULT FROM
CHANNEL 0
CONTINUOUSLY CONVERTS ON A
CONSECUTIVE SEQUENCE OF CHANNELS
FROM CHANNEL 0 UP TO AND INCLUDING
THE PREVIOUSLY SELECTED CHANNEL
ADD3 TO CHANNEL ADD0 IN THE CONTROL
REGISTER
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
POWER ON
WRITE
BIT = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
07
691-
071
Figure 71. Continuous Conversion Without Programming
the Shadow Register
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