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參數(shù)資料
| 型號： | AB28F400BX-T90 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | JT 32C 32#20 PIN RECP |
| 中文描述： | 256K X 16 FLASH 12V PROM, 90 ns, PDSO44 |
| 封裝： | 1.110 X 0.525 INCH, PLASTIC, SOP-44 |
| 文件頁數(shù)： | 25/34頁 |
| 文件大?。?/td> | 461K |
| 代理商： | AB28F400BX-T90 |
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A28F400BX-T/B
DC CHARACTERISTICS
(Continued)
Symbol
Parameter
Notes
Min
Typ
Max
Unit
Test Condition
V
OH
Output High Voltage
2.4
V
V
CC
e
V
CC
Min
I
OH
e b
2.5 mA
V
PPL
V
PP
during Normal Operations
3
0.0
6.5
V
V
PPH
V
PP
during Erase/Write Operations
7
11.4
12.0
12.6
V
V
LKO
V
CC
Erase/Write Lock Voltage
RP
Y
Unlock Voltage
2.0
V
V
HH
11.5
13.0
V
Boot Block Write/Erase
CAPACITANCE
(4)
T
A
e
25
§
C, f
e
1 MHz
Symbol
Parameter
Typ
Max
Unit
Condition
C
IN
Input Capacitance
6
8
pF
V
IN
e
0V
V
OUT
e
0V
C
OUT
Output Capacitance
10
12
pF
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at V
CC
e
5.0V, V
PP
e
12.0V, T
e
25
§
C. These currents
are valid for all product versions (packages and speeds).
2. I
CCES
is specified with the device deselected. If the device is read while in Erase Suspend Mode, current draw is the sum
of I
CCES
and I
CCR
.
3. Block Erases and Word/Byte Writes are inhibited when V
PP
e
V
PPL
and not guaranteed in the range between V
PPH
and
V
PPL
.
4. Sampled, not 100% tested.
5. Automatic Power Savings (APS) reduces I
CCR
to less than 1 mA typical in static operation.
6. CMOS Inputs are either V
CC
g
0.2V or GND
g
0.2V. TTL Inputs are either V
IL
or V
IH
.
7. V
PP
e
12.0V
g
5% for applications requiring 1,000 block erase cycles.
STANDARD TEST CONFIGURATION
STANDARD
AC INPUT/OUTPUT REFERENCE WAVEFORM
290501–12
AC test inputs are driven at V
OH
(2.4 V
TTL
) for a Logic ‘‘1’’ and V
OL
(0.45 V
TTL
) for a logic ‘‘0’’. Input timing begins at V
IH
(2.0 V
TTL
) and V
IL
(0.8 V
TTL
). Output timing ends at V
IH
and V
IL
. Input rise and fall times (10%
to 90%)
k
10 ns.
STANDARD
AC TESTING LOAD CIRCUIT
290501–13
C
L
e
100 pF
C
L
Includes Jig Capacitance
R
L
e
3.3 K
X
25
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