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參數(shù)資料
| 型號(hào)： | AB28F400BX-T90 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | JT 32C 32#20 PIN RECP |
| 中文描述： | 256K X 16 FLASH 12V PROM, 90 ns, PDSO44 |
| 封裝： | 1.110 X 0.525 INCH, PLASTIC, SOP-44 |
| 文件頁(yè)數(shù)： | 17/34頁(yè) |
| 文件大?。?/td> | 461K |
| 代理商： | AB28F400BX-T90 |
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A28F400BX-T/B
During Erase Suspend mode, the chip can go into a
pseudo-standby mode by taking CE
Y
to V
IH
and the
active current is now a maximum of 10 mA. If the
chip is enabled while in this mode by taking CE
Y
to
V
IL
, the Erase Resume command can be issued to
resume the erase operation.
Upon completion of reads from any block other than
the block being erased, the Erase Resume com-
mand must be issued. When the Erase Resume
command is given, the WSM will continue with the
erase sequence and complete erasing the block. As
with the end of erase, the status register must be
read, cleared, and the next instruction issued in or-
der to continue.
3.3.6 EXTENDED CYCLING
Intel has designed extended cycling capability into
its ETOX III flash memory technology. The 4-Mbit
boot block flash family is designed for 1,000 pro-
gram/erase cycles on each of the seven blocks. The
combination of low electric fields, clean oxide pro-
cessing and minimized oxide area per memory cell
subjected to the tunneling electric field, results in
very high cycling capability.
17
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