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參數(shù)資料
| 型號： | 935268252557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-486-1, LQFP-144 |
| 文件頁數(shù)： | 57/80頁 |
| 文件大?。?/td> | 306K |
| 代理商： | 935268252557 |
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Philips Semiconductors
Preliminary specification
PDI1394L40
1394 enhanced AV link layer controller
2000 Dec 15
57
13.2.11
Isochronous Receiver Interrupt Acknowledge (IRXINTACK) – Base Address: 0x04C
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CIPT
AGFL
T
RCVBP
SQOV
CRCERR
IRXEMPTY
FSYNC
SEQERR
IR512LFT
SV01846
31 30
IR256LFT
IR100LFT
IRXFULL
SYT
OVF
Reset Value 0x00000000
Bit 14:
R/W
SYTOVF: SYT FIFO overflow. The isochronous receiver’s SYT field FIFO has overflowed and has been
automatically reset and cleared. This interrupt alerts the host controller that up to 7 AVFSYNC pulses may be
missing due to an SYT field reception error.
Bit 10:
R/W
IR100LFT: Interrupt when receiver queue reaches 100 quadlets from full.
Bit 9:
R/W
IR256LFT: Interrupt when receiver queue reaches 256 quadlets from full.
Bit 8:
R/W
IR512LFT: Interrupt when receiver queue reaches 512 quadlets from full. This bit is disabled if 0.5K Byte buffer size
is set.
Bit 7:
R/W
IRXFULL: Isochronous data memory bank has become full. this is a fatal error, the recommended action is to reset
and re-initialize the receiver.
Bit 6:
R/W
IRXEMPTY: Isochronous data memory bank has become empty.
Bit 5:
R/W
FSYNC: Pulse at fsync output.
Bit 4:
R/W
SEQERR: Sequence error of data blocks.
Bit 3:
R/W
CRCERR: CRC error in bus packet.
Bit 2:
R/W
CIPTAGFLT: Faulty CIP header tag (E,F bits). i.e.: The CIP header did not meet the standard and the whole packet
is ignored.
Bit 1:
R/W
RCVBP: Bus packet processing complete.
Bit 0:
R/W
SQOV: Status queue overflow. This is a fatal error, the recommended action is to reset and re-initialize the receiver.
13.2.12
Isochronous Receiver Interrupt Enable (IRXINTE) – Base Address: 0x050
Interrupt enable bits for AV Receiver.
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7
6
5 4 3
2 1
0
ECIPT
AGFL
T
ERCVBP
ESQOV
ECRCERR
EIRXEMPTY
EFSYNC
ESEQERR
EIR512LFT
31 30
SV01847
EIR256LFT
EIR100LFT
EIRXFULL
ESYTOVF
Reset Value 0x00000000
Bit 14..0 are interrupt enable bits for the Isochronous Receiver Interrupt Acknowledge (IRXINTACK).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 08008GOB | 125 A, 800 V, SCR, TO-209AC |
| 935268252551 | 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144 |
| 08008GOC | 125 A, 800 V, SCR, TO-209AC |
| 08008GOD | 125 A, 800 V, SCR, TO-208AD |
| 08010GOB | 125 A, 1000 V, SCR, TO-209AC |
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