參數資料
型號: 4571
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機的CMOS
文件頁數: 90/126頁
文件大?。?/td> 1627K
代理商: 4571
Rev.1.02
May 25, 2007
Page 66 of 124
REJ03B0179-0102
4571 Group
Note 1. “R” represents read enabled, and “W” represents write enabled.
Pull-up control register PU0
at reset : 00002
at RAM back-up : state retained
R/W
TAPU0/TPU0A
PU03
Port P03 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU02
Port P02 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU01
Port P01 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU00
Port P00 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
Pull-up control register PU1
at reset : 00002
at RAM back-up : state retained
R/W
TAPU1/TPU1A
PU13
Port P13 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU12
Port P12 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU11
Port P11 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU10
Port P10 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
Pull-up control register PU2
at reset : 00002
at RAM back-up : state retained
R/W
TAPU2/TPU2A
PU23
Not used
0
This bit has no function, but read/write is enabled.
1
PU22
Not used
0
This bit has no function, but read/write is enabled.
1
PU21
Port P21 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
PU20
Port P20 pull-up transistor
control bit
0
Pull-up transistor OFF
1
Pull-up transistor ON
Port output structure control register FR0
at reset : 00002
at RAM back-up : state retained
W
TFR0A
FR03
Not used
0
This bit has no function, but read/write is enabled.
1
FR02
Not used
0
This bit has no function, but read/write is enabled.
1
FR01
Port P31 output structure selection bit
0
N-channel open-drain output
1
CMOS output
FR00
Port P30 output structure selection bit
0
N-channel open-drain output
1
CMOS output
Port output structure control register FR1
at reset : 00002
at RAM back-up : state retained
W
TFR1A
FR13
Port D3 output structure selection bit
0
N-channel open-drain output
1
CMOS output
FR12
Port D2 output structure selection bit
0
N-channel open-drain output
1
CMOS output
FR11
Port D1 output structure selection bit
0
N-channel open-drain output
1
CMOS output
FR10
Port D0 output structure selection bit
0
N-channel open-drain output
1
CMOS output
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