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| 型號(hào)： | 4571 |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機(jī)的CMOS |
| 文件頁(yè)數(shù)： | 45/126頁(yè) |
| 文件大小： | 1627K |
| 代理商： | 4571 |
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Rev.1.02
May 25, 2007
Page 25 of 124
REJ03B0179-0102
4571 Group
(4) Bit 3 of register I2
When the input of the P21/INT1 pin is controlled with the
bit 3 of register I2 in software, be careful about the
following notes.
Depending on the input state of the P21/INT1 pin, the external
1 interrupt request flag (EXF1) may be set when the bit 3 of
register I2 is changed. In order to avoid the occurrence of an
unexpected interrupt, clear the bit 1 of register V1 to “0” (refer
to (1) in Figure 27) and then, change the bit 3 of register I2.
In addition, execute the SNZ1 instruction to clear the EXF1
flag to “0” after executing at least one instruction (refer to (2)
in Figure 27).
Also, set the NOP instruction for the case when a skip is
performed with the SNZ1 instruction (refer to (3) in Figure
27).
Fig 27. External 1 interrupt program example-1
(5) Bit 3 of register I2
When the bit 3 of register I2 is cleared to “0”, the RAM
back-up mode is selected and the input of INT1 pin is
disabled, be careful about the following notes.
When the INT1 pin input is disabled (register I23 = “0”), set
the key-on wakeup of INT1 pin to be invalid (register L20 =
“0”) before system enters to the RAM back-up mode. (refer to
(1) in Figure 28)
.
Fig 28. External 1 interrupt program example-2
(6) Bit 2 of register I2
When the interrupt valid waveform of the P21/INT1 pin is
changed with the bit 2 of register I2 in software, be careful
about the following notes.
Depending on the input state of the P21/INT1 pin, the external
1 interrupt request flag (EXF1) may be set when the bit 2 of
register I2 is changed. In order to avoid the occurrence of an
unexpected interrupt, clear the bit 1 of register V1 to “0” (refer
to (1) in Figure 29) and then, change the bit 2 of register I2 is
changed.
In addition, execute the SNZ1 instruction to clear the EXF1
flag to “0” after executing at least one instruction (refer to (2)
in Figure 29).
Also, set the NOP instruction for the case when a skip is
performed with the SNZ1 instruction (refer to (3) in Figure
29).
Fig 29. External 1 interrupt program example-3
LA
4
; (
××0×2)
TV1A
; The SNZ1 instruction is valid ...... (1)
LA
8
; (1
×××2)
TI1A
; Control of INT1 pin input is changed
NOP
...................................................... (2)
SNZ0
; The SNZ1 instruction is executed
(EXF1 flag cleared)
NOP
...................................................... (3)
×: these bits are not used here.
LA
0
; (
×0××2)
TL1A
; INT1 key-on wakeup disabled .....(1)
DI
EPOF
POF
; RAM back-up
×: these bits are not used here.
LA
4
; (
××0×2)
TV1A
; The SNZ1 instruction is valid ......(1)
LA
12
; (1
×××2)
TI1A
; Interrupt valid waveform is changed
NOP
.......................................................(2)
SNZ0
; The SNZ1 instruction is executed
(EXF1 flag cleared)
NOP
.......................................................(3)
×: these bits are not used here.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 4571_08 | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:Standard Characteristics |
| 45-710 | 制造商:GC Electronics 功能描述:EXTENSION CABLE, PARALLEL, 6FT, PUTTY; Cable Length - Imperial:6ft; Cable Length - Metric:1.83m; Connector Type A:Centronics 36 Position Plug; Connector Type B:Centronics 36 Position Receptacle; Jacket Color:Putty; Cable Color:Putty 制造商:Calrad Electronics 功能描述:Cable Assembly Parallel 6m 28AWG 36 POS SCSI to 36 POS SCSI M-F |
| 4-571011-3 | 功能描述:ANVIL 制造商:te connectivity amp connectors 系列:* 零件狀態(tài):有效 標(biāo)準(zhǔn)包裝:1 |
| 457102-1 | 制造商:TE Connectivity 功能描述:BLOCK, PLATE MTG - Bulk |
| 45710224PTC2103 | 制造商:Omron Corporation 功能描述: |
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