參數(shù)資料
型號： 4571
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述： 單芯片4位微機的CMOS
文件頁數(shù)： 25/126頁
文件大?。?/td> 1627K
代理商： 4571
Rev.1.02
May 25, 2007
Page 120 of 124
REJ03B0179-0102
4571 Group
Recommended operating conditions
Note 1.The average output current is the average value during 100ms.
Table 26 Recommended operating conditions 1 (Ta = –20
°C to 85 °C, VDD = 1.8 to 5.5 V, unless otherwise noted)
Symbol
Parameter
Conditions
Limits
Unit
Min.
Typ.
Max.
VDD
Supply voltage
(with a ceramic resonator)
f(STCK)
≤ 6MHz
4
5.5
V
f(STCK)
≤ 4.4MHz
2.7
5.5
f(STCK)
≤ 2.2MHz
2
5.5
f(STCK)
≤ 1.1MHz
1.8
5.5
VDD
Supply voltage
(when an external clock is
used)
f(STCK)
≤ 4.8MHz
4
5.5
V
f(STCK)
≤ 3.2MHz
2.7
5.5
f(STCK)
≤ 1.6MHz
2
5.5
f(STCK)
≤ 0.8MHz
1.8
5.5
VRAM
RAM back-up voltage
(at RAM back-up)
1.6
5.5
V
VSS
Supply voltage
0V
VIH
“H” level input voltage
P0, P1, P2, P3, D0–D4, K
0.8VDD
VDD
V
XIN
0.7VDD
VDD
RESET, INT0, INT1
0.85VDD
VDD
CNTR0
0.85VDD
VDD
VIL
“L” level input voltage
P0, P1, P2, P3, D0–D4, K
0
0.3VDD
mA
XIN
00.3VDD
RESET, INT0, INT1
00.3VDD
CNTR0
0
0.15VDD
IOH(peak)
“H” level peak output current
P3, D0–D3
VDD = 5V
20
mA
VDD = 3V
10
C, CNTR1
VDD = 5V
30
VDD = 3V
15
IOH(avg)
“H” level average output current
(Note 1)
P3, D0–D3
VDD = 5V
10
mA
VDD = 3V
5
C, CNTR1
VDD = 5V
15
VDD = 3V
7
IOL(peak)
“L” level peak output current
P0, P1, P2, P3, D0–D4, C,
RESET, CNTR0, CNTR1,
VDD = 5V
24
mA
VDD = 3V
12
IOL(avg)
“L” level average output current
(Note 1)
P0, P1, P2, P3, D0–D4, C,
RESET, CNTR0, CNTR1,
VDD = 5V
12
mA
VDD = 3V
6
ΣIOH(avg)
“H” level total average current
P3, D0–D3, C, CNTR1
30
mA
ΣIOL(avg)
“L” level total average current
P0, P10, P11, RESET
30
mA
P10, P11, P2, P3, D0–D4, C, CNTR0, CNTR1
30
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