參數(shù)資料
型號: 4571
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機的CMOS
文件頁數(shù): 73/126頁
文件大?。?/td> 1627K
代理商: 4571
Rev.1.02
May 25, 2007
Page 50 of 124
REJ03B0179-0102
4571 Group
(1) Ceramic resonator
When the ceramic resonator is used as the main clock (f(XIN)),
connect the ceramic resonator and the external circuit to pins XIN
and XOUT at the shortest distance. A feedback resistor is built in
between pins XIN and XOUT (Figure 51).
(2) External clock
When the external signal clock is used for the main clock
(f(XIN)), connect the XIN pin to the clock source and leave XOUT
pin open (Figure 52).
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using
the ceramic resonator (refer to the recommended operating
condition).
Also, note that the RAM back-up mode (POF instruction) cannot
be used when using the external clock.
(3) Clock control register MR
Register MR controls the selection of operation mode. Set the
contents of this register through register A with the TMRA
instruction. In addition, the TAMR instruction can be used to
transfer the contents of register MR to register A.
Fig 51. Ceramic resonator external circuit
Fig 52. External clock input circuit
Note 1.“R” represents read enabled, and “W” represents write enabled.
XIN
XOUT
CIN
COUT
Rd
Note: Externally connect a damping resistor Rd depending
on the oscillation frequency.
(A feedback resistor is built-in.)
Use the resonator manufacturer’s recommended value
because constants such as capacitance depend on
the resonator.
4571
XIN
XOUT
4571
External oscillation circuit
VDD
VSS
Table 23 Return source and return condition
Clock control register MR
at reset : 11112
at RAM back-up : 11112
R/W
TAMR/TMRA
MR3
Operation mode selection bits
MR3 MR2
Operation mode
0
Through mode (frequency not divided)
0
1
Frequency divided by 2 mode
MR2
1
0
Frequency divided by 4 mode
1
Frequency divided by 8 mode
MR1 Not used
0
This bit has no function, but read/write is enabled.
1
MR0 Not used
0
This bit has no function, but read/write is enabled.
1
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