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| 型號： | 376 |
| 廠商： | Intel Corp. |
| 英文描述： | DIODE SCHOTTKY DUAL-DUAL SERIES 30V 200mW 0.38V-vf 200mA-IFM 1mA-IF 0.2uA-IR SOT-363 3K/REEL |
| 中文描述： | 376TM，高性能32位嵌入式處理器 |
| 文件頁數(shù)： | 35/95頁 |
| 文件大?。?/td> | 1293K |
| 代理商： | 376 |
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376 EMBEDDED PROCESSOR
BUS CYCLE DEFINITION SIGNALS
(W/R, D/C, M/IO, LOCK)
These three-state outputs define the type of bus cy-
cle being performed: W/R distinguishes between
write and read cycles, D/C distinguishes between
data and control cycles, M/IO distinguishes between
memory and I/O cycles, and LOCK distinguishes be-
tween locked and unlocked bus cycles. All of these
signals are active LOW and will float during bus ac-
knowledge.
The primary bus cycle definition signals are W/R,
D/C and M/IO, since these are the signals driven
valid as ADS (Address Status output) becomes ac-
tive. The LOCK signal is driven valid at the same
time the bus cycle begins, which due to address
pipelining, could be after ADS becomes active. Ex-
act bus cycle definitions, as a function of W/R, D/C
and M/IO are given in Table 4.2.
LOCK indicates that other system bus masters are
not to gain control of the system bus while it is ac-
tive. LOCK is activated on the CLK2 edge that be-
gins the first locked bus cycle (i.e., it is not active at
the same time as the other bus cycle definition pins)
and is deactivated when ready is returned to the end
of the last bus cycle which is to be locked. The be-
ginning of a bus cycle is determined when READY is
returned in a previous bus cycle and another is
pending (ADS is active) or the clock in which ADS is
driven active if the bus was idle. This means that it
follows more closely with the write data rules when it
is valid, but may cause the bus to be locked longer
than desired. The LOCK signal may be explicitly acti-
vated by the LOCK prefix on certain instructions.
LOCK is always asserted when executing the XCHG
instruction, during descriptor updates, and during the
interrupt acknowledge sequence.
BUS CONTROL SIGNALS
(ADS, READY, NA)
The following signals allow the processor to indicate
when a bus cycle has begun, and allow other system
hardware to control address pipelining and bus cycle
termination.
Address Status (ADS)
This three-state output indicates that a valid bus cy-
cle definition and address (W/R, D/C, M/IO, BHE,
BLE and A
23
–A
1
) are being driven at the 80376
pins. ADS is an active LOW output. Once ADS is
driven active, valid address, byte enables, and defi-
nition signals will not change. In addition, ADS will
remain active until its associated bus cycle begins
(when READY is returned for the previous bus cycle
when running pipelined bus cycles). ADS will float
during bus hold acknowledge. See sections
Non-
Pipelined Bus Cycles
and
Pipelined Bus Cycles
for additional information on how ADS is asserted
for different bus states.
Transfer Acknowledge (READY)
This input indicates the current bus cycle is com-
plete, and the active bytes indicated by BHE and
BLE are accepted or provided. When READY is
sampled active during a read cycle or interrupt ac-
knowledge cycle, the 80376 latches the input data
and terminates the cycle. When READY is sampled
active during a write cycle, the processor terminates
the bus cycle.
Table 4.2. Bus Cycle Definition
M/IO
D/C
W/R
Bus Cycle Type
Locked
0
0
0
INTERRUPT ACKNOWLEDGE
Yes
0
0
1
Does Not Occur
D
0
1
0
I/O DATA READ
No
0
1
1
I/O DATA WRITE
No
1
0
0
MEMORY CODE READ
No
1
0
1
HALT:
Address
e
2
BHE
e
1
BLE
e
0
SHUTDOWN:
Address
e
0
BHE
e
1
BLE
e
0
No
1
1
0
MEMORY DATA READ
Some Cycles
1
1
1
MEMORY DATA WRITE
Some Cycles
35
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 376 | 制造商:Pro-Signal 功能描述:; Supply Voltage:28VDC; Lamp Base Type:M |
| 37-6.8 | 制造商:Distributed By MCM 功能描述:Resistor 1/2W 6.8 Ohm Flameproof, Bag of 20 制造商:MCM 功能描述:1/2 Watt Flameproof Resistors, Resistance: 6.8 Ohm, Tolerance: 5 %, Quantity: 20 per bag |
| 37-6.8K | 制造商:Distributed By MCM 功能描述:Resistor 1/2W 6.8K Ohm Flameproof, Bag of 20 制造商:MCM 功能描述:RESISTOR 1/2W 6.8K OHM FLAMPRF20 PER BAG |
| 376/377-1ZM | 制造商:Rayovac 功能描述:SILVER ELECTRONIC BTRY 1PK MERCURY FREE |
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