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參數(shù)資料
| 型號： | 376 |
| 廠商： | Intel Corp. |
| 英文描述： | DIODE SCHOTTKY DUAL-DUAL SERIES 30V 200mW 0.38V-vf 200mA-IFM 1mA-IF 0.2uA-IR SOT-363 3K/REEL |
| 中文描述： | 376TM，高性能32位嵌入式處理器 |
| 文件頁數(shù)： | 32/95頁 |
| 文件大?。?/td> | 1293K |
| 代理商： | 376 |
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376 EMBEDDED PROCESSOR
PROTECTION AND I/O PERMISSION BIT MAP
The I/O instructions that directly refer to addresses
in the processor’s I/O space are IN, INS, OUT and
OUTS. The 80376 has the ability to selectively trap
references to specific I/O addresses. The structure
that enables selective trapping is the
I/O Permis-
sion Bit Map
in the TSS segment (see Figures 3.7
and 3.8). The I/O permission map is a bit vector.
The size of the map and its location in the TSS seg-
ment are variable. The processor locates the I/O
permission map by means of the
I/O map base
field
in the fixed portion of the TSS. The
I/O map base
field is 16 bits wide and contains the offset of the
beginning of the I/O permission map.
If an I/O instruction (IN, INS, OUT or OUTS) is en-
countered, the processor first checks whether
CPL
s
IOPL. If this condition is true, the I/O opera-
tion may proceed. If not true, the processor checks
the I/O permission map.
Each bit in the map corresponds to an I/O port byte
address; for example, the bit for port 41 is found at
I/O map base
a
5 linearly, (5
c
8
e
40), bit offset
1. The processor tests all the bits that correspond to
the I/O addresses spanned by an I/O operation; for
example, a double word operation tests four bits cor-
responding to four adjacent byte addresses. If any
tested bit is set, the processor signals a general pro-
tection exception. If all the tested bits are zero, the
I/O operations may proceed.
It is not necessary for the I/O permission map to
represent all the I/O addresses. I/O addresses not
spanned by the map are treated as if they had one-
bits in the map. The
I/O map base
should be at
least one byte less than the TSS limit and the last
byte beyond the I/O mapping information must con-
tain all 1’s.
Because the I/O permission map is in the TSS seg-
ment, different tasks can have different maps. Thus,
the operating system can allocate ports to a task by
changing the I/O permission map in the task’s TSS.
IMPORTANT IMPLEMENTATION NOTE:
Beyond the last byte of I/O mapping information in
the I/O permission bit map
must
be a byte contain-
ing all 1’s. The byte of all 1’s must be within the
limit of the 80376’s TSS segment (see Figure 3.7).
4.0 FUNCTIONAL DATA
The Intel 80376 embedded processor features a
straightforward functional interface to the external
hardware. The 80376 has separate parallel buses
for data and address. The data bus is 16 bits in
width, and bidirectional. The address bus outputs
24-bit address values using 23 address lines and
two-byte enable signals.
The 80376 has two selectable address bus cycles:
pipelined and non-pipelined. The pipelining option
allows as much time as possible for data access by
240182–16
Figure 4.1. Functional Signal Groups
32
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 376 | 制造商:Pro-Signal 功能描述:; Supply Voltage:28VDC; Lamp Base Type:M |
| 37-6.8 | 制造商:Distributed By MCM 功能描述:Resistor 1/2W 6.8 Ohm Flameproof, Bag of 20 制造商:MCM 功能描述:1/2 Watt Flameproof Resistors, Resistance: 6.8 Ohm, Tolerance: 5 %, Quantity: 20 per bag |
| 37-6.8K | 制造商:Distributed By MCM 功能描述:Resistor 1/2W 6.8K Ohm Flameproof, Bag of 20 制造商:MCM 功能描述:RESISTOR 1/2W 6.8K OHM FLAMPRF20 PER BAG |
| 376/377-1ZM | 制造商:Rayovac 功能描述:SILVER ELECTRONIC BTRY 1PK MERCURY FREE |
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