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參數(shù)資料
| 型號： | 33742S |
| 廠商： | Motorola, Inc. |
| 元件分類： | CAN |
| 英文描述： | System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver |
| 中文描述： | 系統(tǒng)基礎(chǔ)芯片的增強(qiáng)型（SBC）的高速CAN收發(fā)器 |
| 文件頁數(shù)： | 41/52頁 |
| 文件大?。?/td> | 1087K |
| 代理商： | 33742S |
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33742
41
——————————————————
Input/Output Register (IOR)
Tables 19
through
21
contain various Input/Output Register
information.
Table 20
provides information about HS control in
Normal and Standby modes, while
Table 21
provides status bit
information.
——————————————————
Table 18. CAN Register Status Bits
Name
Value
Description
CANWU
0
No CAN wake-up occurred.
1
CAN wake-up occurred.
CAN-F
0
No CAN failure.
1
CAN failure
(Note 55)
.
CAN-UF
0
Identified CAN failure
(Note 55)
.
1
No
n-
identified CAN failure.
THERM-
CUR
0
No overtemperature or overcurrent on
CANH or CANL drivers.
1
Overtemperature or overcurrent on
CANH or CANL drivers.
Notes
55.
Error bits are latched in the CAN register.
Table 19. Input/Output Register
IOR
R/W
D3
D2
D1
D0
$011b
W
–
HSON
–
–
R
V2LOW
HSOT
VSUPLOW
DEBUG
Reset
Value
–
–
0
–
–
Reset
Condition
(Write)
(Note 56)
–
–
POR
–
–
Notes
56.
See
Table 8
, page 38, for definitions of reset conditions.
Table 20. HSON Control Bits
Value
HS State
0
HS OFF, in Normal and Standby modes.
1
HS ON, in Normal and Standby modes
(Note 57)
.
Notes
57.
When HS is turned OFF due to an overtemperature condition,
it can be turned ON again by setting the appropriate control bit
to 1. Error bits are latched in the IOR register.
Table 21. Input/Output Register Status Bits
Name
Value
Description
V2LOW
0
V2 > 4.0 V.
1
V2 < 4.0 V.
HSOT
0
No HS overtemperature.
1
HS overtemperature.
VSUPLOW
0
V
SUP
> 6.1 V.
1
V
SUP
< 6.1 V.
DEBUG
0
33742 not in Debug mode.
1
33742 accepts command to go to
Debug modes (no Watchdog).
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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