33742
20
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Functional Modes
The 33742 has four modes of operation, all controlled by the
SPI. The modes are Standby, Normal, Stop, and Sleep. An
additional temporary mode called
Normal Request mode is
automatically accessed by the device after reset or wake-up
from Stop mode. A Reset mode is also implemented. Special
modes and configuration are possible for debug and program
microcontroller flash memory.
Table 2
below offers a summary of the functional modes.
Reset Mode
In the Reset mode, the
RST
terminal is LOW and a timer runs
for t
RSTDUR
time. After t
RSTDUR
has elapsed, the 33742 enters
Normal Request mode. Reset mode is entered if a reset
condition occurs (V
DD
LOW, watchdog timeout, or watchdog
trigger in a closed window).
Normal Request Mode
Normal Request mode is a temporary mode automatically
accessed by the 33742 after the Reset mode or after the 33742
wakes up from Stop mode. After wake-up from the Sleep mode
or after device power-up, the 33742 enters the Reset mode
before entering the Normal Request mode. After a wake-up
from the Stop mode, the 33742 enters the Normal Request
mode directly.
Table 2. Table of Operation
Mode
Voltage Regulator
HS Switch
Wake-Up
Capabilities
(if Enabled)
RST
Terminal
INT
Terminal
Watchdog
Software
CAN Cell
Normal
Request
V
DD
: ON,
V2: OFF,
HS: OFF
–
Low for
t
RST
DUR
time, then HIGH
–
–
–
Normal
V
DD
: ON,
V2: ON,
HS: Controllable
–
Normally HIGH.
Active LOW if
WDOG
or V
DD
undervoltage occurs
If enabled, signal
failure (V
DD
Pre-Warning Temp,
CAN, HS)
Running
TXD/RXD
Standby
V
DD
: ON,
V2: OFF,
HS: Controllable
–
Same as Normal
mode
Same as Normal
mode
Running
Low power
Stop
V
DD
: ON
(Limited Current
Capability),
V2: OFF,
HS:OFF or Cyclic
Sense
CAN, SPI, L0:L3,
Cyclic Sense,
Forced Wake-Up,
I
DD
Overcurrent
(Note 39)
Normally HIGH.
Active LOW if
WDOG
(Note 40)
or V
DD
undervoltage occurs
Signal 33742
wake-up and
I
DD
> I
DDS-WU
(not maskable)
Running if enabled.
Not running if
disabled
Low power.
Wake-up capability
if enabled
Sleep
V
DD
: OFF,
V2: OFF,
HS: OFF or Cyclic
CAN, SPI,
L0:L3, Cyclic Sense
Forced Wake-Up
LOW
Not Active
Not running
Low power.
Wake-up capability
if enabled
Normal
Debug
(Note 38)
Same as Normal
–
Normally HIGH.
Active LOW if V
DD
undervoltage occurs
Same as Normal
Not running
Same as Normal
Standby
Debug
(Note 38)
Same as Standby
–
Normally HIGH.
Active LOW if V
DD
undervoltage occurs
Same as Standby
Not running
Same as Standby
Stop Debug
(Note 38)
Same as Stop
Same as Stop
Normally HIGH.
Active LOW if V
DD
undervoltage occurs
Same as Stop
Not running
Same as Stop
Flash
Programming
Forced externally
–
Not operating
Not operating
Not operating
Not Operating
Notes
38.
Mode entered via special sequence described under the heading
Debug Mode: Hardware and Software Debug with the 33742
beginning on
page 25.
I
DD
overcurrent always enabled.
WDOG
if enabled.
39.
40.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.