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參數資料
| 型號： | 28F320W30 |
| 廠商： | Intel Corp. |
| 元件分類： | DRAM |
| 英文描述： | 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 中文描述： | 1.8伏英特爾無線閃存的3伏的I / O和SRAM（寬30） |
| 文件頁數： | 40/82頁 |
| 文件大?。?/td> | 749K |
| 代理商： | 28F320W30 |
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28F6408W30, 28F3204W30, 28F320W30, 28F640W30
34
Preliminary
10.0
Power and Reset Considerations
10.1
Power-Up/Down Characteristics
In order to prevent any condition that may result in a spurious write or erase operation, it is
recommended to power-up V
CC
, V
CCQ
and S-V
CC
together. Conversely, V
CC
, V
CCQ
and S-V
CC
must power-down together.
It is also recommended to power-up V
PP
with or slightly after V
CC
. Conversely, V
PP
must power-
down with or slightly before V
CC
.
If V
CCQ
and/or V
PP
are not connected to the V
CC
supply, then V
CC
should attain V
CC
Min before
applying V
CCQ
and V
PP
. Device inputs should not be driven before supply voltage = V
CC
Min.
Power supply transitions should only occur when RST# is low.
10.2
Power Supply Decoupling
When the device is accessed, many internal conditions change. Circuits are enabled to charge
pumps and voltages are switched. All this internal activity produces transient signals. The
magnitude of these transient signals depends on the device and the system capacitive and inductive
loading. To minimize the effect of these transient signals, a 0.1 μF ceramic decoupling capacitor is
required across each V
CC
, V
CCQ
, V
PP,
S-V
CC
to system ground. Capacitors should also be placed
as close as possible to the package balls.
10.3
Flash Reset Characteristics
By holding the flash device in reset during power-up/down transitions, invalid bus conditions can
be masked. The flash device enters a reset mode when RST# is driven low. In reset mode, internal
flash circuitry is turned off and outputs are placed in a high-impedance state.
After return from reset, a certain amount of time is required before the flash device is capable of
performing normal operations. Upon return from reset, the flash device defaults to page mode.
If RST# is driven low during a program or erase operation, the operation will be aborted and the
memory contents at the aborted block or address are no longer valid. See
Figure 24,
“
Reset
Operations Waveforms
”
on page 52
for detailed information regarding reset timings.
相關PDF資料 |
PDF描述 |
|---|---|
| 28F6408W30 | 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 28F640W30 | 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30) |
| 28F320B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 28F640P3 | Intel StrataFlash Embedded Memory |
| 28F320C3 | 3 Volt Advanced Boot Block Flash Memory(3 V 高級快速引導塊閃速存儲器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 28F400B3 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:SMART 3 ADVANCED BOOT BLOCK WORD-WIDE |
| 28F400B5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SMART 5 BOOT BLOCK. FLASH MEMORY FAMILY 2. 4. 8 MBIT |
| 28F400B5WG8BET | 制造商: 功能描述: 制造商:Micron Technology Inc 功能描述: 制造商:undefined 功能描述: |
| 28F400BL-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-MBlT (256K x 16. 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY |
| 28F400BL-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-MBlT (256K x 16. 512K x 8) LOW-POWER BOOT BLOCK FLASH MEMORY FAMILY |
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