參數(shù)資料
型號: 28F016SA
廠商: Intel Corp.
英文描述: 16-Mbit(1 Mbit x 16, 2 Mbit x 8) FlashFile Memory(16-M位(1 M位 x 16, 2 M位 x 8) FlashFile存儲器)
中文描述: 16兆位(1兆位× 16,2兆位× 8)FlashFile內(nèi)存(16米位(1米位× 16,2米位× 8)FlashFile存儲器)
文件頁數(shù): 37/55頁
文件大?。?/td> 849K
代理商: 28F016SA
E
5.7
28F016SA
37
SEE NEW DESIGN RECOMMENDATIONS
Power-Up and Reset Timings: COMMERCIAL/EXTENDED TEMPERATURE
RP#
(P)
3/5#
(Y)
0V
3.3V
V Power-Up
5.0V
V
CC
(3V,5V)
4.5V
PLYL
t
t
PL5V
YLPH
t
YHPH
t
Valid 5.0V Outputs
Valid
Valid
Address
(A)
Data
(Q)
Valid 3.3V Outputs
AVQV
t
AVQV
t
PHQV
t
PHQV
t
PHEL3
t
CE #
PHEL5
t
X
0489_13
Figure 14. V
CC
Power-Up and RP# Reset Waveforms
Symbol
Parameter
Notes
Min
Max
Unit
t
PLYL
t
PLYH
t
YLPH
t
YHPH
t
PL5V
t
PL3V
RP# Low to 3/5# Low (High)
0
μs
3/5# Low (High) to RP# High
1
2
μs
RP# Low to V
CC
at 4.5V minimum
(to V
CC
at 3.0V min or 3.6V max)
2
0
μs
t
PHEL3
RP# High to CE# Low (3.3V V
CC
)
1
500
ns
t
PHEL5
RP# High to CE# Low (5V V
CC
)
1
330
ns
t
AVQV
Address Valid to Data Valid for V
CC
= 5V ± 10%
3
80
ns
t
PHQV
RP# High to Data Valid for V
CC
= 5V ± 10%
3
480
ns
NOTES:
CE
0
#, CE
1
# and OE# are switched low after Power-Up.
1.
The t
YLPH
/t
YHPH
and t
PHEL3
/t
PHEL5
times must be strictly followed to guarantee all other read and program specifications.
2.
The power supply may start to switch concurrently with RP# going low.
3.
The address access time and RP# high to data valid time are shown for 5V V
operation of the 28F016SA-080. Refer to
the AC Characteristics Read Only Operations for 3.3V V
CC
and all other speed options.
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