參數(shù)資料
型號(hào)： 16LF628A
廠商： Microchip Technology Inc.
元件分類： 8位微控制器
英文描述： FLASH-Based 8-Bit CMOS Microcontrollers
中文描述： 基于閃存的8位CMOS微控制器
文件頁數(shù)： 82/168頁
文件大?。?/td> 3760K
代理商： 16LF628A
PIC16F627A/628A/648A
DS40044A-page 80
Preliminary
2002 Microchip Technology Inc.
FIGURE 12-9:
ASYNCHRONOUS RECEPTION WITH ADDRESS DETECT
FIGURE 12-10:
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST
FIGURE 12-11:
ASYNCHRONOUS RECEPTION WITH ADDRESS BYTE FIRST FOLLOWED BY
VALID DATA BYTE
START
BIT
BIT1
BIT0
BIT8
BIT0
STOP
BIT
START
BIT
BIT8
STOP
BIT
RB1/RX/DT (PIN)
RCV BUFFER REG
RCV SHIFT REG
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
WORD 1
RCREG
BIT8 = 0, DATA BYTE
BIT8 = 1, ADDRESS BYTE
ADEN = 1
(ADDRESS MATCH
ENABLE)
'1'
'1'
Note:
This timing diagram shows a data byte followed by an address byte. The data byte is not read into the RCREG
(Receive Buffer) because ADEN = 1 and Bit 8 = 0.
START
BIT
BIT1
BIT0
BIT8
BIT0
STOP
BIT
START
BIT
BIT8
STOP
BIT
RB1/RX/DT (PIN)
REG
RCV BUFFER REG
RCV SHIFT
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
WORD 1
RCREG
BIT8 = 1, ADDRESS BYTE
BIT8 = 0, DATA BYTE
ADEN = 1
(ADDRESS MATCH
ENABLE)
'1'
'1'
Note:
This timing diagram shows an address byte followed by an data byte. The data byte is not read into the RCREG
(receive buffer) because ADEN was not updated (still = 1) and Bit 8 = 0.
START
BIT
BIT1
BIT0
BIT8
BIT0
STOP
BIT
START
BIT
BIT8
STOP
BIT
RB1/RX/DT (PIN)
REG
RCV BUFFER REG
RCV SHIFT
READ RCV
BUFFER REG
RCREG
RCIF
(INTERRUPT FLAG)
WORD 2
RCREG
BIT8 = 1, ADDRESS BYTE
BIT8 = 0, DATA BYTE
ADEN
(ADDRESS MATCH
ENABLE)
WORD 1
RCREG
Note:
This timing diagram shows an address byte followed by an data byte. The data byte is read into the RCREG
(Receive Buffer) because ADEN was updated after an address match, and was cleared to a ‘0’, so the contents
of the Receive Shift Register (RSR) are read into the Receive Buffer regardless of the value of Bit 8.
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