參數(shù)資料
型號(hào)： 16LF628A
廠商： Microchip Technology Inc.
元件分類： 8位微控制器
英文描述： FLASH-Based 8-Bit CMOS Microcontrollers
中文描述： 基于閃存的8位CMOS微控制器
文件頁數(shù)： 21/168頁
文件大?。?/td> 3760K
代理商： 16LF628A
2002 Microchip Technology Inc.
Preliminary
DS40044A-page 19
PIC16F627A/628A/648A
TABLE 4-4:
SPECIAL FUNCTION REGISTERS SUMMARY BANK1
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Reset
(1)
Details
on
Page
Bank 1
80h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical
register)
xxxx xxxx
28
81h
OPTION
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
23
82h
PCL
Program Counter's (PC) Least Significant Byte
0000 0000
28
83h
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
22
84h
FSR
Indirect data memory address pointer
xxxx xxxx
28
85h
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
1111 1111
31
86h
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
1111 1111
36
87h
—
Unimplemented
—
—
88h
—
Unimplemented
—
—
89h
—
Unimplemented
—
—
8Ah
PCLATH
—
—
—
Write buffer for upper 5 bits of program counter
---0 0000
28
8Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
24
8Ch
PIE1
EEIE
CMIE
RCIE
TXIE
—
CCP1IE
TMR2IE
TMR1IE
0000 -000
25
8Dh
—
Unimplemented
—
—
8Eh
PCON
—
—
—
—
OSCF
—
POR
BOR
---- 1-0x
27
8Fh
—
Unimplemented
—
—
90h
—
Unimplemented
—
—
91h
—
Unimplemented
—
—
92h
PR2
Timer2 Period Register
1111 1111
52
93h
—
Unimplemented
—
—
94h
—
Unimplemented
—
—
95h
—
Unimplemented
—
—
96h
—
Unimplemented
—
—
97h
—
Unimplemented
—
—
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D
0000 -010
71
99h
SPBRG
Baud Rate Generator Register
0000 0000
71
9Ah
EEDATA
EEPROM data register
xxxx xxxx
89
9Bh
EEADR
EEPROM address register
xxxx xxxx
90
9Ch
EECON1
—
—
—
—
WRERR
WREN
WR
RD
---- x000
90
9Dh
EECON2
EEPROM control register 2 (not a physical register)
---- ----
90
9Eh
—
Unimplemented
—
—
9Fh
Legend:
VRCON
— = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded =
unimplemented
For the Initialization Condition for Registers Tables, refer to Table 14-6 and Table 14-7.
VREN
VROE
VRR
—
VR3
VR2
VR1
VR0
000- 0000
67
Note
1:
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