參數(shù)資料
型號： 16LF628A
廠商： Microchip Technology Inc.
元件分類： 8位微控制器
英文描述： FLASH-Based 8-Bit CMOS Microcontrollers
中文描述： 基于閃存的8位CMOS微控制器
文件頁數(shù)： 50/168頁
文件大小： 3760K
代理商： 16LF628A
PIC16F627A/628A/648A
DS40044A-page 48
Preliminary
2002 Microchip Technology Inc.
7.0
TIMER1 MODULE
The Timer1 module is a 16-bit timer/counter consisting
of two 8-bit registers (TMR1H and TMR1L) which are
readable and writable. The TMR1 register pair
(TMR1H:TMR1L) increments from 0000h to FFFFh
and rolls over to 0000h. The Timer1 Interrupt, if
enabled, is generated on overflow of the TMR1 register
pair which latches the interrupt flag bit TMR1IF
(PIR1<0>). This interrupt can be enabled/disabled by
setting/clearing the Timer1 interrupt enable bit TMR1IE
(PIE1<0>).
Timer1 can operate in one of two modes:
As a timer
As a counter
The Operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
In Timer mode, the TMR1 register pair value incre-
ments every instruction cycle. In Counter mode, it
increments on every rising edge of the external clock
input.
Timer1 can be enabled/disabled by setting/clearing
control bit TMR1ON (T1CON<0>).
Timer1 also has an internal “RESET input”. This
RESET can be generated by the CCP module
(Section 9.0). Register 7-1 shows the Timer1 control
register.
For the PIC16F627A/628A/648A, when the Timer1
oscillator is enabled (T1OSCEN is set), the RB7/T1OSI
and RB6/T1OSO/T1CKI pins become inputs. That is,
the TRISB<7:6> value is ignored.
REGISTER 7-1:
T1CON: TIMER1 CONTROL REGISTER (ADDRESS: 10h)
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
—
T1CKPS1 T1CKPS0
T1OSCEN
T1SYNC TMR1CS TMR1ON
bit 7
bit 0
bit 7-6
Unimplemented:
Read as '0'
bit 5-4
T1CKPS1:T1CKPS0
: Timer1 Input Clock Prescale Select bits
11
= 1:8 Prescale value
10
= 1:4 Prescale value
01
= 1:2 Prescale value
00
= 1:1 Prescale value
bit 3
T1OSCEN
: Timer1 Oscillator Enable Control bit
1
= Oscillator is enabled
0
= Oscillator is shut off
(1)
bit 2
T1SYNC
: Timer1 External Clock Input Synchronization Control bit
TMR1CS = 1
1
= Do not synchronize external clock input
0
= Synchronize external clock input
TMR1CS = 0
This bit is ignored. Timer1 uses the internal clock when TMR1CS = 0.
bit 1
TMR1CS
: Timer1 Clock Source Select bit
1
= External clock from pin RB6/T1OSO/T1CKI (on the rising edge)
0
= Internal clock (F
OSC
/4)
bit 0
TMR1ON
: Timer1 On bit
1
= Disables Timer1
0
= Stops Timer1
Note 1:
The oscillator inverter and feedback resistor are turned off to eliminate power drain.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
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