參數(shù)資料
型號: 16F628
廠商: Microchip Technology Inc.
英文描述: CAT 5E CROSSOVER PATCH CORD CABLE BLUE 1 FT
中文描述: 基于閃存的8位CMOS微控制器
文件頁數(shù): 46/168頁
文件大小: 3760K
代理商: 16F628
PIC16F627A/628A/648A
DS40044A-page 44
Preliminary
2002 Microchip Technology Inc.
5.3
I/O Programming Considerations
5.3.1
BI-DIRECTIONAL I/O PORTS
Any instruction that writes, operates internally as a read
followed by a write operation. The
BCF
and
BSF
instruc-
tions, for example, read the register into the CPU, exe-
cute the bit operation and write the result back to the
register. Caution must be used when these instructions
are applied to a port with both inputs and outputs
defined. For example, a
BSF
operation on bit5 of
PORTB will cause all eight bits of PORTB to be read
into the CPU. Then the
BSF
operation takes place on
bit5 and PORTB is written to the output latches. If
another bit of PORTB is used as a bi-directional I/O pin
(e.g., bit0) and is defined as an input at this time, the
input signal present on the pin itself would be read into
the CPU and rewritten to the data latch of this particular
pin, overwriting the previous content. As long as the pin
stays in the Input mode, no problem occurs. However,
if bit0 is switched into Output mode later on, the content
of the data latch may now be unknown.
Reading a port register reads the values of the port
pins. Writing to the port register writes the value to the
port latch. When using read-modify-write instructions
(ex.
BCF, BSF
, etc.) on a port, the value of the port pins
is read, the desired operation is done to this value, and
this value is then written to the port latch.
Example 5-2 shows the effect of two sequential read-
modify-write instructions (ex.,
BCF, BSF
, etc.) on an
I/O port.
A pin actively outputting a Low or High should not be
driven from external devices at the same time in order
to change the level on this pin (“wired-or”, “wired-and”).
The resulting high output currents may damage the
chip.
EXAMPLE 5-2:
READ-MODIFY-WRITE
INSTRUCTIONS ON AN
I/O PORT
5.3.2
SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle (Figure 5-
16). Therefore, care must be exercised if a write fol-
lowed by a read operation is carried out on the same I/
O port. The sequence of instructions should be such to
allow the pin voltage to stabilize (load dependent)
before the next instruction, which causes that file to be
read into the CPU, is executed. Otherwise, the previ-
ous state of that pin may be read into the CPU rather
than the new state. When in doubt, it is better to sepa-
rate these instructions with a
NOP
or another instruction
not accessing this I/O port.
FIGURE 5-16:
SUCCESSIVE I/O OPERATION
;Initial PORT settings:PORTB<7:4> Inputs
;
;PORTB<7:6> have external pull-up and are
;not connected to other circuitry
;
;
PORTB<3:0> Outputs
PORT latchPORT Pins
---------- ----------
;
;01pp pppp 11pp pppp
;
;10pp pppp 11pp pppp
;10pp pppp 10pp pppp
BCF STATUS, RP0
BCF PORTB, 7
BSF STATUS, RP0
BCF TRISB, 7
BCF TRISB, 6
;
;Note that the user may have expected the
;pin values to be 00pp pppp. The 2nd BCF
;caused RB7 to be latched as the pin value
;(High).
Q1
Q2 Q3 Q4
PC
Instruction
fetched
Q1
Q2 Q3 Q4
Q1
Q2 Q3 Q4 Q1
Q2 Q3 Q4
PC + 1
PC
PC + 2
NOP
PC + 3
NOP
MOVWF
PORTB
Write to PORTB
MOVF
PORTB, W
Read to PORTB
T
PD
Execute
MOVWF
PORTB
Execute
MOVF
PORTB, W
Port pin
sampled here
Execute
NOP
Note
1:
2:
This example shows write to PORTB followed by a read from PORTB.
Data setup time = (0.25 T
CY
- T
PD
) where T
CY
= instruction cycle and T
PD
= propagation delay of Q1 cycle to output valid.
Therefore, at higher clock frequencies, a write followed by a read may be problematic.
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