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參數資料
| 型號： | μPD705100 |
| 廠商： | NEC Corp. |
| 英文描述： | 32 Bit Microprocessor(32 位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數： | 62/81頁 |
| 文件大?。?/td> | 441K |
| 代理商： | ΜPD705100 |
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62
V830
TM
USER'S MANUAL
Upon accepting an interrupt request, the V830 jumps to a fixed address to start interrupt handling. The
target address of the jump is set to FE0000n0H (built-in RAM) or FFFFFEn0H (external memory), where n
is the interrupt level, either of which may be specified with the IHA bit of the system register, HCCW.
Caution Interrupt level 15 is reserved for use by development tools (in-circuit emulator, ROM
emulator, etc). If the user uses interrupt level 15, those development tools may fail to
operate.
6.2 NONMASKABLE INTERRUPTS
The V830 samples an NMI at the rising edge of a bus clock pulse. When the NMI changes from the high
to low level, an interrupt request is detected. Once a nonmaskable interrupt request has been detected, the
NMI can subsequently be deactivated at any time because the NMI is detected at the falling edge. An interrupt
request thus detected is retained in the CPU until the CPU starts interrupt handling.
Upon accepting a nonmaskable interrupt, the V830 jumps to the fixed address (FFFFFFD0H). If another
nonmaskable interrupt is issued during nonmaskable interrupt handling (the NP bit of PSW is set to 1), it is
retained in the processor. If, however another nonmaskable interrupt request is issued during clearing of the
latch circuit by internal processing after the start of nonmaskable interrupt handling, it is not retained in the
processor.
6.3 RESET
The V830 can be reset by inputting a low-level signal of 20 or more clock pulses to RESET. After the V830
has been reset, the CPU starts program execution from address FFFFFFF0H.
If RESET is driven high, the CPU starts instruction fetching from the reset address.
Immediately after power-on or in the stop-mode state, the active pulse width of the RESET should be
determined by adding the PLL oscillation settling time to the active level of 20 clock pulses.
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