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參數(shù)資料
| 型號： | ZR36060 |
| 廠商： | Zoran Corporation |
| 元件分類： | Codec |
| 英文描述： | Integrated JPEG Codec(集成JPEG編解碼器) |
| 中文描述： | 綜合JPEG編解碼器（集成的JPEG編解碼器） |
| 文件頁數(shù)： | 23/46頁 |
| 文件大?。?/td> | 307K |
| 代理商： | ZR36060 |
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21
Integrated JPEG CODEC
6.0 OPERATION
6.1 ZR36060 Functional States
For the purposes of this description, the ZR36060 can be viewed
as having 7 states:
RESET - In this state the RESET input is held active.
SLEEP - Power-down. The SLEEP input is held active in this
state.
IDLE - END is asserted and the ZR36060 is waiting for
START.
WAIT-ACTIVE - After the ZR36060 sensed START assert-
ed, it waits for the beginning of the active area of the next
field to be processed (this depends on the state of FRAME
when START was sampled active). END is deasserted.
CMP - Compression of the active area. The video bus is in-
put, and the code data bus is output. END is deasserted.
EXP - Decompression (expansion) of the active area. The
video bus is output, and the code data bus is input. END is
deasserted.
WAIT-ISR - After the ZR36060 finished the compression or
decompression and asserted END while JIRQ is active (due
to a non-masked interrupt), the ZR36060 waits in this state
for the host to read the Interrupt Status Register.
6.2 State Transitions
Figure 28 depicts the states and their transitions.
6.3 The SLEEP State
In this state, all the pins remain in the logic states they were in
immediately before the transition to SLEEP. No host, video or
code interface operation is allowed in the SLEEP state.
When the ZR36060 leaves the SLEEP state it returns to IDLE,
ready for the next compression or decompression operation.
This state is also used internally to lock the internal PLL to the
frequency of VCLKx2, so it is mandatory to go through the
SLEEP state at least once after power-up and before operating
the device (see section 7.0 “Power Management and Power-
up”).
6.4 Loading Parameters and Tables
Prior to a compression or decompression process the host must
load the appropriate parameters and tables into the ZR36060.
The parameters affect the compression/decompression mode,
the video interface, and the operation of the code port.
All parameters and tables may be loaded only when the
ZR36060 is in the IDLE state.
First, the host controller writes (via the host interface) the desired
parameters and/or tables in their correct location in the 1Kbyte
internal memory (see chapter 8.0 “Register and Memory
Description” for details).
Then, the host sets the ZR36060’s (write-only) Load bit. This
commands the ZR36060 to initialize or ‘Load’ all internal
hardware blocks with the parameters in its internal memory, and
also to decode and expand the abbreviated format Huffman and
Quantization tables. While the ZR36060 is performing this Load
operation, the (read-only) Busy bit is set to ‘1’. The host must poll
for the completion of the loading, i.e.- wait for the Busy bit to be
reset to ‘0’, before starting the compression or decompression
process.
The START signal is ignored during the execution of the Load,
i.e.- the ZR36060 remains in the IDLE state (with END asserted).
Only after Load is completed (Busy is reset) and the new param-
eter values become effective, the ZR36060 is ready to sample
START again to move to the WAIT-ACTIVE state to start the
compression/decompression process (see Figure 29).
Parameters and status registers can be read in any ZR36060
state (besides RESET and SLEEP).
WAIT
ACTIVE
RESET
Power-Up
RESET
! SLEEP &
! RESET
SLEEP
SLEEP
SLEEP &! RESET
SLEEP
Figure 28. ZR36060 Functional States
! SLEEP
IDLE
! START
START
! (active area)
EXP
CMP
active area
[1]
& compression
active area
[1]
&
decompression
END & ! JIRQ
END & ! JIRQ
JIRQ
END & JIRQ
END & JIRQ
WAIT ISR
! JIRQ
Active area of the correct field, depending on the state of
FRAME
when START
was sampled active.
1.
相關(guān)PDF資料 |
PDF描述 |
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| ZR36060 | Circular Connector; No. of Contacts:19; Series:; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:14; Circular Contact Gender:Socket; Circular Shell Style:Cable Receptacle; Insert Arrangement:14-19 |
| ZR36060PQC | Integrated JPEG CODEC |
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| ZR36067PQC | AV PCI CONTROLLER |
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相關(guān)代理商/技術(shù)參數(shù) |
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| ZR36060PQC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated JPEG CODEC |
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| ZR36060PQC-29.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| ZR36067 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AV PCI CONTROLLER |
| ZR36067PQC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:AV PCI CONTROLLER |
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