參數(shù)資料
型號(hào)： ZL30410
廠(chǎng)商： Zarlink Semiconductor Inc.
英文描述： CONN HDR INVERSE 30POS 5ROW VERT
中文描述： 多業(yè)務(wù)線(xiàn)卡鎖相環(huán)
文件頁(yè)數(shù)： 7/38頁(yè)
文件大?。?/td> 400K
代理商： ZL30410
ZL30410
Data Sheet
7
Zarlink Semiconductor Inc.
53
C34/C44
Clock 34.368 MHz / clock 44.736 MHz
(CMOS Output). This clock is
programmable to be either 34.368 MHz (for E3 applications) or 44.736 MHz
(for DS3 applications) when E3DS3/OC3 is high, or to be either 8.592 MHz or
11.184 MHz when E3DS3/OC3 is low. See description of E3DS3/OC3 and
E3/DS3 inputs for details.
54
VDD
Positive Power Supply
.
55
HOLDOVER
Holdover Indicator
(CMOS output). Logic high at this output indicates that the
device is in Holdover mode.
56
NC
No internal bonding Connection.
Leave unconnected.
57
LOCK
Lock Indicator
(CMOS output). Logic high at this output indicates that
ZL30410 is locked to the input reference. See LOCK indicator description in
Section 2.2.3, “Lock Indicator (LOCK),” on page 9.
58
NC
No internal bonding Connection.
Leave unconnected.
59
IC
Internal Connection
. Connect to logic high.
60
IC
Internal Connection
. Connect to ground.
61
SECOR
Secondary Reference Out of Range
(Output). Logic high at this pin indicates
that the Secondary Reference is off the PLL centre frequency by more than
±12ppm. See SECOR (PRIOR) pin description in Section 3.2 on page 15 for
details.
62
OE
Output Enable
(Input). Logic high on this input enables C19, F16, C16, C8,
C6, C4, C2, C1.5, F8 and F0 signals. Pulling this input low will force the output
clocks pins into a high impedance state.
63
NC
No internal bonding Connection.
Leave unconnected.
64
RESET
RESET
(5V tolerant input). The ZL30410 must be reset after power-up in order
to set internal functional blocks into a default state. The internal reset is
performed by forcing RESET pin low for a minimum of 1 μs after the C20
Master Clock is applied to pin C20i. This operation forces the ZL30410 internal
state machine into a RESET state for a duration of 625 μs.
65
NC
No internal bonding Connection.
Leave unconnected.
66-69
IC
Internal connection.
Connect these pins to logic high.
70
GND
Ground
.
71, 72
IC
Internal Connection
(Input). Connect these pins to ground.
73
VDD
Positive Power Supply
.
74 - 77
IC
Internal connection.
Connect these pins to logic high.
78, 79
NC
No internal bonding Connection.
Leave unconnected.
80
IC
Internal Connection
(Input). Connect this pin to ground.
Pin Description (continued)
Pin #
Name
Description
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