參數(shù)資料
型號(hào)： ZL30410
廠商： Zarlink Semiconductor Inc.
英文描述： CONN HDR INVERSE 30POS 5ROW VERT
中文描述： 多業(yè)務(wù)線卡鎖相環(huán)
文件頁數(shù)： 17/38頁
文件大小： 400K
代理商： ZL30410
ZL30410
Data Sheet
17
Zarlink Semiconductor Inc.
Figure 8 - Transition from Free-run to Normal mode
4.1.2 Single Reference Operation: NORMAL --> AUTO HOLDOVER --> NORMAL
The NORMAL to AUTO-HOLDOVER to NORMAL transition will usually happen when the Line Card loses its single
reference clock unexpectedly. The sequence starts with the reference clock transitioning from OK --> FAIL at a time
when ZL30410 operates in Normal mode (as is shown in Figure 10). This failure is detected by the active
Acquisition PLL based on the following FAIL criteria:
- Frequency offset on 8 kHz, 1.544 MHz, 2.048 MHz and 19.44 MHz reference clocks exceeds ±30000
ppm (±3%).
- Single phase hit on 1.544 MHz, 2.048 MHz and 19.44 MHz exceeds half of the cycle of the reference
clock.
After detecting any of these anomalies on a reference clock the Acquisition PLL will switch itself into Holdover mode
forcing the Core PLL to automatically switch into the Auto Holdover state. This condition is flagged by LOCK = 0
and HOLDOVER = 1.
Figure 9 - Automatic entry into Auto Holdover State and recovery into Normal mode
Ref: OK AND
MS2,MS1=00
{AUTO}
Ref: OK-->FAIL AND
MS2,MS1=00
{AUTO}
MS2,MS1=01 OR
RefSel change
MS2,MS1=10 forces
unconditional return from
any state to Free-run
RESET=1
MS2,MS1=00
OR
MS2,MS1=01
RefSel Change
OR
MS2,MS1=01
Ref: FAIL-->OK AND
MS2,MS1=00
{AUTO}
RESET
FREE-
RUN
10
HOLD-
OVER
01
NORMAL
00
AUTO
HOLD-
OVER
Ref: OK AND
MS2,MS1=00
{AUTO}
Ref: OK-->FAIL AND
MS2,MS1=00
{AUTO}
MS2,MS1=01 OR
RefSel change
MS2,MS1=10 forces
unconditional return from
any state to Free-run
RESET=1
MS2,MS1=00
OR
MS2,MS1=01
RefSel Change
OR
MS2,MS1=01
Ref: FAIL-->OK AND
MS2,MS1=00
{AUTO}
RESET
FREE-
RUN
10
HOLD-
OVER
01
NORMAL
00
AUTO
HOLD-
OVER
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參數(shù)描述
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