參數(shù)資料
型號: ZL30414QGC
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: SONET/SDH Clock Multiplier PLL
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PQFP64
封裝: 10 X 10 MM, 1 MM HEIGHT, MS-026ACD, TQFP-64
文件頁數(shù): 1/24頁
文件大?。?/td> 421K
代理商: ZL30414QGC
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.
Features
Meets jitter requirements of Telcordia GR-253-
CORE for OC-192, OC-48, OC-12, and OC-3
rates
Meets jitter requirements of ITU-T G.813 for STM-
64, STM-16, STM-4 and STM-1 rates
Provides four LVPECL differential output clocks at
622.08 MHz
Provides a CML differential clock at 155.52 MHz
Provides a single-ended CMOS clock at 19.44
MHz
Lock Indicator
Provides enable/disable control of output clocks
Accepts a CMOS reference at 19.44 MHz
3.3 V supply
Applications
SONET/SDH line cards
Network Element timing cards
Description
The ZL30414 is an analog phase-locked loop (APLL)
designed to provide jitter attenuation and rate
conversion for SDH (Synchronous Digital Hierarchy)
and
SONET
(Synchronous
networking equipment. The ZL30414 generates very
low jitter clocks that meet the jitter requirements of
Telcordia GR-253-CORE OC-192, OC-48, OC-12, OC-
3 rates and ITU-T G.813 STM-64, STM-16, STM-4 and
STM-1 rates.
Optical
Network)
The ZL30414 accepts a CMOS compatible reference
at 19.44 MHz and generates four LVPECL differential
output clocks at 622.08 MHz, a CML differential
clock at 155.52 MHz and a single-ended CMOS
clock at 19.44 MHz. The output clocks can be
individually enabled or disabled. The ZL30414
provides a LOCK indication.
February 2005
Ordering Information
ZL30414QGC
ZL30414QGC1 64 Pin TQFP* Trays
*Pb Free Matte Tin
-40
°
C to +85
°
C
64 Pin TQFP
Trays
ZL30414
SONET/SDH Clock Multiplier PLL
Data Sheet
Figure 1 - Functional Block Diagram
Frequency
& Phase
Detector
VCO
C622oP/N-A
Frequency
Dividers
and
Clock
Drivers
LPF
C622oP/N-B
C622oP/N-C
VDD GND VCC
C622oP/N-D
C19o
C19oEN
C155oP/N
C155oEN
Loop
Filter
C622oEN-C
C622oEN-D
C19i
C622oEN-B
BIAS
C622oEN-A
19.44MHz
05
State
Machine
LOCK
Reference
and
Bias Circuit
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