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參數(shù)資料
| 型號： | ZL30410 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | CONN HDR INVERSE 30POS 5ROW VERT |
| 中文描述： | 多業(yè)務(wù)線卡鎖相環(huán) |
| 文件頁數(shù)： | 12/38頁 |
| 文件大?。?/td> | 400K |
| 代理商： | ZL30410 |
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ZL30410
Data Sheet
12
Zarlink Semiconductor Inc.
Figure 5 - ZL30410 State Machine
Reset State
The Reset State must be entered when ZL30410 is powered-up. In this state, all arithmetic calculations are halted,
and clocks are stopped. The Reset state is entered by pulling the RESET pin low for a minimum of 1μs. When the
RESET pin is pulled back high, internal logic starts a 625μs initialization process before switching into the Free-run
state (MS2, MS1 = 10).
Free-Run State (Free-Run mode)
The Free-run state is entered when synchronization to a network reference is not possible or is not required.
Typically this occurs during installation or maintenance. In the Free-run state, the accuracy of the generated clocks
is determined by the accuracy and stability of the ZL30410 Master Crystal Oscillator.
Normal State (Normal Mode or Locked Mode)
The Normal State is entered when a good quality reference clock from the network is available for synchronization.
The ZL30410 automatically detects the frequency of the reference clock (8 kHz, 1.544 MHz, 2.048 MHz or 19.44
MHz) and sets the LOCK status pin high after acquiring synchronization. In the Normal state all generated clocks
(C1.5o, C2o, C4o, C6o, C8o, C16o, C19o, C34/C44 and C155) and frame pulses (F0o, F8o, F16o) are
synchronized to the master timing card. To guarantee uninterrupted synchronization, the ZL30410 has two
Acquisition PLLs that continuously monitor the quality of the incoming reference clocks. This dual architecture
enables quick replacement of a poor or failed reference and minimizes the time spent in other states.
STATE
MS2,MS1
Notes:
--> - External transition
{AUTO} - Automatic internal transition
{MANUAL} - User initiated transition
Ref: OK AND
MS2,MS1=00
{AUTO}
Ref: OK-->FAIL AND
MS2,MS1=00
{AUTO}
MS2,MS1=01 OR
RefSel change
MS2,MS1=10 forces
unconditional return from
any state to Free-run
RESET=1
MS2,MS1=00
OR
MS2,MS1=01
RefSel Change
OR
MS2,MS1=01
Ref: FAIL-->OK AND
MS2,MS1=00
{AUTO}
RESET
FREE-
RUN
10
HOLD-
OVER
01
NORMAL
00
AUTO
HOLD-
OVER
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相關(guān)代理商/技術(shù)參數(shù) |
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| ZL30410_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-service Line Card PLL |
| ZL30410QCC | 制造商:Microsemi Corporation 功能描述:PLL CLOCK GEN SGL UP TO 19.44MHZ 80LQFP EP - Trays |
| ZL30410QCC1 | 制造商:Microsemi Corporation 功能描述: |
| ZL30410QCG1 | 制造商:Microsemi Corporation 功能描述:IC SONET/SDH NETWORK ELEMENT PLL 制造商:Microsemi Corporation 功能描述:LEAD FREE SONET/SDH NETWORK ELEMENT PLL - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC PLL SONET/SDH/PDH 80LQFP 制造商:Microsemi Corporation 功能描述:IC PLL SONET/SDH/PDH 80LQFP |
| ZL30414 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:SONET/SDH Clock Multiplier PLL |
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