XRT94L33
xr
Rev.1.2.0.
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
128
Table 4 Pin Description of the Microprocessor Interface Signals while the Microprocessor Interface is
operating in the Motorola Mode
PIN
NAME
EQUIVALENT PIN
IN
MOTOROLA
ENVIRONMENT
TYPE
DESCRIPTION
ALE_A
S
AS*
I
Address Strobe: This “active-low” signal is used to latch the contents on the
address bus input pins: A[14:0] into the Microprocessor Interface circuitry. The
contents of the Address Bus are latched into the XRT94L33 on the rising edge of
the ALE_AS signal. This signal can also be used to indicate the start of a burst
cycle.
RdB_D
S
DS*
I
Data Strobe: This signal latches the contents of the bi-directional data bus pins
into the Addressed Register within the XRT94L33 during a Write Cycle.
WRB_
RW
R/W*
I
Read/Write* Input: When this pin is “high”, it indicates a Read Cycle. When this
pin is “l(fā)ow”, it indicates a Write cycle.
Rdy_Dt
ck
DTACK*
O
Data Transfer Acknowledge: The XRT94L33 asserts DTACK* in order to inform
the CPU that the present READ or WRITE cycle is nearly complete. The 68000
family of CPUs requires this signal from its peripheral devices, in order to quickly
and properly complete a READ or WRITE cycle.
1.3.2
INTERFACING THE XRT94L33 TO THE
C/P OVER VIA THE MICROPROCESSOR INTERFACE BLOCK
The Microprocessor Interface block, within the XRT94L33 is very flexible and provides the following options to
the user.
To interface the XRT94L33 to a
C/P over an 8-bit-wide bi-directional data bus.
To interface the XRT94L33 to a wide variety of Microprocessor Interface types
To transfer data (between the XRT94L33 IC and the
C/P) via the Programmed I/O Mode.
Each of the options is discussed in detail below. Section _ will discuss Data Access (e.g., Programmed I/O
and Burst) Mode when interfaced to both Motorola-type and Intel-type
C/P.
1.3.2.1
SELECTING THE APPROPRIATE MICROPROCESSOR INTERFACE MODE
The user can configure the Microprocessor Interface, within the XRT94L33, to support a wide-variety of
Microprocessor Interface Modes. The user can accomplish this by setting the PType[2:0] input pins to the
appropriate setting as listed below.
Table 5 Settings for the PType[2:0] and the Corresponding Microprocessor Interface Modes
PTYPE[2:0]
MICROPROCESSOR INTERFACE MODE
000
68HC11, 8051, 80C188
001
Motorola – 68000 Family
010
Intel X86 Family
011
Intel i960
100
IDT3051/52
101
Power PC 403
This revision of the XRT94L33 Data Sheet discusses the Motorola and Intel X86 Modes in detail.
The
remaining Microprocessor Interface Modes will be discussed in a later revision of this data sheet.