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參數(shù)資料
| 型號： | X930A |
| 廠商： | Intel Corp. |
| 英文描述： | UNIVERSAL SERIAL BUS MICROCONTROLLER |
| 中文描述： | 通用串行總線的微控制器 |
| 文件頁數(shù)： | 1/38頁 |
| 文件大?。?/td> | 283K |
| 代理商： | X930A |
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ADVANCE INFORMATION
COPYRIGHT INTEL CORPORATION, 1997
February 1997
Order Number:
272917-003
8x930Ax
UNIVERSAL SERIAL BUS
MICROCONTROLLER
The 8x930AxUSB microcontroller is based on an 8xC251Sxmicrocontroller core. It consists of standard
8xC251Sx peripherals plus an added USB function. The 8x930Axuses the standard instruction set of the
MCS 251 architecture, which is binary code compatible with the MCS 51 architecture. The USB function
integrates the USB transceiver, serial bus interface engine (SIE), function interface unit (FIU) and
transmit/receive FIFOs. The USB function also supports full-speed/low-speed data rates, suspend/resume
modes, isochronous/non-isochronous transfers, and is fully compliant with the USB rev 1.0 specification.
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Complete Universal Serial Bus
Specification 1.0 Compatibility
— Supports Isochronous and
Non-isochronous Data
— Bidirectional Half-duplex Link
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On-chip USB Transceiver
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Serial Bus Interface Engine (SIE)
— Packet Decoding/Generation
— CRC Generation and Checking
— NRZI Encoding/Decoding and
Bit-stuffing
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USB Reset Interrupt
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Four Transmit FIFOs
— Three 16-byte FIFOs
— One Configurable FIFO (up to
1 Kbyte)
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Four Receive FIFOs
— Three 16-byte FIFOs
— One Configurable FIFO (up to
1 Kbyte)
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Automatic Transmit/Receive FIFO
Management
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Suspend/Resume Operation
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Three New USB Interrupt Vectors
— USB Function Interrupt
— Start of Frame
— Suspend/Resume
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Phase-locked Loop
— 12 Mbps or 1.5 Mbps Data Rate
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Low Clock Mode
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User-selectable Configurations
— External Wait State
— Address Range
— Page Mode
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Real-time Wait Function
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256-Kbyte External Code/Data Memory
Space
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On-chip ROM Options
— 0, 8, or 16 Kbytes
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1 Kbyte On-chip Data RAM
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Four Input/Output Ports
— 1 Open-drain port
— 3 Quasi-bidirectional Ports
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Programmable Counter Array (PCA)
— 5 Capture/Compare Modules
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Serial I/O Port (UART)
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Hardware Watchdog Timer
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Three Flexible 16-bit Timer/Counters
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Power-saving Idle and Powerdown
Modes
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Register-based MCS
251 Architecture
— 40-byte Register File
— Registers Accessible as Bytes,
Words, or Doublewords
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Code Compatible with MCS 51 and MCS
251 Microcontrollers
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6 or 12 MHz Crystal Operation
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