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參數(shù)資料
| 型號(hào)： | X9313UMZ-3T1 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Digitally Controlled Potentiometer |
| 中文描述： | 50K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 32 POSITIONS, PDSO8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-187AA, MSOP-8 |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 281K |
| 代理商： | X9313UMZ-3T1 |
1
FN8177.5
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9313
Digitally Controlled Potentiometer (XDCP)
Linear, 32 Taps, 3 Wire Interface, Terminal
Voltages
±
V
CC
The Intersil X9313 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
Control
Parameter adjustments
Signal processing
Features
Solid-state potentiometer
3-wire serial interface
32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
31 resistive elements
- Temperature compensated
- End to end resistance range ±20%
- Terminal voltages, -V
CC
to +V
CC
Low power CMOS
- V
CC
= 3V or 5V
- Active current, 3mA max.
- Standby current, 500μA max.
High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
R
TOTAL
values = 1k
Ω
, 10k
Ω
, 50k
Ω
Packages
- 8 Ld SOIC, 8 Ld MSOP and 8 Ld PDIP
Pb-free plus anneal available (RoHS compliant)
Block Diagram
5-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
ONE OF
THIRTY-TWO
OUTPUTS
ACTIVE
AT A
RESISTOR
ARRAY
R
H
/V
H
U/D
INC
CS
TRANSFER
GATES
V
CC
V
SS
R
L
/V
L
R
W
/V
W
CONTROL
AND
MEMORY
UP/DOWN
V
CC
(SUPPLY VOLTAGE)
V
SS
(GROUND)
R
H
/V
H
R
W
/V
W
R
L
/V
L
GENERAL
DETAILED
0
1
2
28
29
30
31
(U/D)
INCREMENT
(INC)
DEVICE SELECT
(CS)
5-BIT
UP/DOWN
COUNTER
TIME
DECODER
Data Sheet
April 18, 2007
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