參數(shù)資料
型號: W989D6CBGX7E
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 32M X 16 DDR DRAM, 5.4 ns, PBGA54
封裝: 8 X 9 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-54
文件頁數(shù): 18/67頁
文件大?。?/td> 1469K
代理商: W989D6CBGX7E
W989D6CB / W989D2CB
512Mb Mobile LPSDR
Publication Release Date: Jun, 27, 2011
- 25 -
Revision A01-004
8.3.5 WRITE with auto precharge interrupted by a WRITE (with or without auto precharge)
A WRITE to bank m will interrupt a WRITE on bank n when registered. The precharge to bank n will begin after tWR is met, where tWR
begins when the WRITE to bank m is registered. The last valid data WRITE to bank n will be data registered one clock prior to a WRITE
to bank m.
CLK
T0
T1
T2
T3
T4
T5
T6
T7
Command
Bank n
Bank m
Address
DQ
Internal
states
NOP
precharge
Bank n,
Col a
Bank m,
Col d
tWR-bank m
tRP-bank n
WRITE-AP
Bank m
WRITE with burst of 4
Interrupt burst, write-back
WRITE with burst of 4
Page active
WRITE-AP
Bank n
Don’t Care
Note: 1. DQM is LOW.
tWR-bank n
Write-back
Din
a
Din
a+1
Din
a+2
Din
d
Din
d+1
Din
d+2
Din
d+3
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