參數(shù)資料
型號(hào): W981204AH-8H
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, 0.80 MM PITCH, TSOP2-54
文件頁(yè)數(shù): 41/42頁(yè)
文件大?。?/td> 1082K
代理商: W981204AH-8H
W981204AH
8M x 4 Banks x 4 bits SDRAM
Revision 1.0
Publication Release Date: June, 2000
- 8 -
NOTES:
1. Operation exceeds "ABSOLUTE MAXIMUM RATING" may cause permanent damage to the devices.
2. All voltages are referenced to VSS
3. These parameters depend on the cycle rate and listed values are measured at a cycle rate with the minimum values
of tCK and tRC.
4. These parameters depend on the output loading conditions. Specified values are obtained with output open.
5. Power up sequence is further described in the "Functional Description" section.
6. AC TESTING CONDITIONS
Output Reference Level
1.4V/1.4V
Output Load
See diagram A below
Input Signal Levels
2.4V/0.4V
Transition Time (Rise and Fall) of Input Signal
2ns
Input Reference Level
1.4V
50 ohms
1.4 V
AC TEST LOAD (A)
Z = 50 ohms
output
50pF
7. Transition times are measured between VIH and VIL.
8. tHZ defines the time at which the outputs achieve the open circuit condition and is not referenced to output level.
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