參數(shù)資料
型號: W981204AH-8H
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, 0.80 MM PITCH, TSOP2-54
文件頁數(shù): 36/42頁
文件大小: 1082K
代理商: W981204AH-8H
W981204AH
8M x 4 Banks x 4 bits SDRAM
Revision 1.0
Publication Release Date: June, 2000
- 41 -
Asynchronous Control
Input Buffer turn on time ( Power down mode exit time ) is specified by tCKS(min) + tCK(min).
Command
NOP
CLK
CKE
Command
A ) tCK < tCKS(min)+tCK(min)
Input Buffer Enable
Command
CLK
CKE
Command
B) tCK >= tCKS(min) + tCK (min)
Input Buffer Enable
Self Refresh/Power Down Mode Exit Timing
Note )
Command
NOP
All Input Buffer(Include CLK Buffer) are turned off in the Power Down mode
and Self Refresh mode
Represents the No-Operation command
Represents one command
tCKS(min)+t CK(min)
tCK
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W981208AH 制造商:WINBOND 制造商全稱:Winbond 功能描述:4M x 8 bit x 4 Banks SDRAM
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W981208BH-7 制造商:WINBOND 制造商全稱:Winbond 功能描述:x8 SDRAM