參數(shù)資料
型號(hào): W981204AH-8H
廠商: WINBOND ELECTRONICS CORP
元件分類(lèi): DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, 0.80 MM PITCH, TSOP2-54
文件頁(yè)數(shù): 28/42頁(yè)
文件大小: 1082K
代理商: W981204AH-8H
W981204AH
8M x 4 Banks x 4 bits SDRAM
Revision 1.0
Publication Release Date: June, 2000
- 34 -
Autoprecharge timing ( Write Cycle )
D0
Write
Act
AP
0
11
10
9
8
7
6
5
4
3
2
1
D0
AP
Act
D1
AP
Act
D1
D2
D3
D4
D5
D6
D7
AP
Act
AP
Act
AP
Act
D1
D0
AP
Act
D1
D2
D3
AP
Act
D0
D1
D2
D3
D4
D5
D6
D7
Write
D0
(1) CAS Latency=2
(2) CAS Latency=3
Write
Act
AP
When the Auto precharge command is asserted, the period from Bank Activate
command to the start of internal precgarging must be at least tRAS(min). .
represents the Write with Auto precharge command.
represents the start of internal precharging.
represents the Bank Activate command.
Note )
tRP
tWR
tRP
tWR
tRP
tWR
tRP
tWR
tRP
tWR
tRP
tWR
tRP
tWR
tRP
tWR
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
( a ) burst length = 1
Command
( b ) burst length = 2
Command
( c ) burst length = 4
Command
( d ) burst length = 8
Command
DQ
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