- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄203637 > W9412G2IB-4 (WINBOND ELECTRONICS CORP) 4M X 32 DDR DRAM, 0.6 ns, PBGA144 PDF資料下載
參數(shù)資料
| 型號： | W9412G2IB-4 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | DRAM |
| 英文描述： | 4M X 32 DDR DRAM, 0.6 ns, PBGA144 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA-144 |
| 文件頁數(shù)： | 24/50頁 |
| 文件大?。?/td> | 826K |
| 代理商： | W9412G2IB-4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
W9412G2IB
Publication Release Date: Aug. 30, 2010
- 30 -
Revision A06
V SWING (MAX)
VDDQ
VSS
T
VIH min (AC)
VREF
VIL max (AC)
SLEW = (VIHmin (AC) - VILmax (AC)) / T
Output
50 Ω
VTT
Timing Reference Load
Output
V(out)
30pF
Notes:
(1)
Conditions outside the limits listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
(2)
All voltages are referenced to VSS, VSSQ. ( 2.5V
±0.1V for DDR500)
(3)
Peak to peak AC noise on VREF may not exceed
±2% VREF(DC).
(4)
VOH = 1.95V, VOL = 0.35V
(5)
VOH = 1.9V, VOL = 0.4V
(6)
The values of IOH(DC) is based on VDDQ = 2.3V and VTT = 1.19V.
The values of IOL(DC) is based on VDDQ = 2.3V and VTT = 1.11V.
(7)
These parameters depend on the cycle rate and these values are measured at a cycle rate with the minimum values
of tCK and tRC.
(8)
VTT is not applied directly to the device. VTT is a system supply for signal termination resistors is expected to be set
equal to VREF and must track variations in the DC level of VREF.
(9)
These parameters depend on the output loading. Specified values are obtained with the output open.
(10) Transition times are measured between VIH min(AC) and VIL max(AC).Transition (rise and fall) of input signals have a fixed
slope.
(11) IF the result of nominal calculation with regard to tCK contains more than one decimal place, the result is rounded up to
the nearest decimal place.
(i.e., tDQSS = 0.75
× tCK, tCK = 7.5 nS, 0.75 × 7.5 nS = 5.625 nS is rounded up to 5.6 nS.)
(12) VX is the differential clock cross point voltage where input timing measurement is referenced.
(13) VID is magnitude of the difference between CLK input level and CLK input level.
(14) VISO means {VICK(CLK)+VICK( CLK )}/2.
(15) Refer to the figure below.
相關PDF資料 |
PDF描述 |
|---|---|
| W9425G6JB-5 | DDR DRAM, PBGA60 |
| W9425G8DH-6 | 32M X 8 DDR DRAM, 0.7 ns, PDSO66 |
| W946432AD-6 | 2M X 32 DDR DRAM, 0.1 ns, PQFP100 |
| W947D6HBHX6E | 8M X 16 DDR DRAM, 5 ns, PBGA60 |
| W9602BB | PUSHBUTTON SWITCH, SPST, MOMENTARY, 10A, 28VDC, PANEL MOUNT-THREADED |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| W9412G2IB-5 | 制造商:Winbond Electronics Corp 功能描述:8*16 DDR1 |
| W9412G6CH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M 】 4 BANKS 】 16 BITS DDR SDRAM |
| W9412G6IH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M × 4 BANKS × 16 BITS DDR SDRAM |
| W9412G6IH-5 | 功能描述:IC DDR-400 SDRAM 128MB 66TSSOPII RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應商設備封裝:8-MFP 包裝:帶卷 (TR) |
| W9412G6JH | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2M ? 4 BANKS ? 16 BITS DDR SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。