
W78E354
- 20 -
* INTMSK
: Interrupt mask register.
BIT
NAME
FUNCTION
0
DSCLINTmsk
Set/clear to enable/disable DSCLINT interrupt.
1
ADCINTmsk
Set/clear to enable/disable ADCINT interrupt.
2
TIMEOUTmsk
Set/clear to enable/disable TIMEOUT interrupt.
3
SOAINTmsk
Set/clear to enable/disable SOAINT interrupt.
4
VEVENTmsk
Set/clear to enable/disable VEVENT interrupt.
5
PARAINTmsk
Set/clear to enable/disable PARAINT interrupt.
6
DDC1INTmsk
Set/clear to enable/disable DDC1INT interrupt.
7
Note: A '1' in any bit of the INTMSK register enables the corresponding interrupt flag in INTVECT to be set by hardware when
the interrupt source generates an interrupt.
* INTVECT
: Interrupt vector register.
BIT
NAME
FUNCTION
NOTE
0
DSCLINT
Set by hardware when DSCL is toggled from High to
Low and kept Low for at least 12/Fosc sec.
See Section
E.6
.
1
ADCINT
Set by hardware when ADC conversion is completed.
See Section
E.10
.
2
TIMEOUT Set by hardware when Autoload timer timeout.
See Section
E.8
.
3
SOAINT
Set by hardware when SOA is High.
See Section
E.12.g
.
4
VEVENT
Set by hardware when Vsync or Vertical frequency
counter timeout.
VSEP
NOV
VEVENT
5
PARAINT
For parabola interrupt generator (set by hardware).
See Section
E.9
.
6
DDC1INT
For DDC1 of DDC port (set by hardware).
See Section
E.6
.
7
Note: To clear the interrupt flag, write a '1' (not '0') to the corresponding bit in INTVECT register.
*
PARAL
: Parabola interrupt generator register, low byte.
*
PARAH
: Parabola interrupt generator register, high byte.
*
AUTOLOAD
: 8-bit Auto-reload timer register. (See Section
H
.)
*
DHREG
: Dummy Hsync frequency generator register. (See Section
L.e
.)
*
DVREG
: Dummy Vsync frequency generator register. (See Section
L.e
.)
*
DDC1
: DDC port's DDC1 data buffer.
*
DDAC0
DDAC2
: 8-bit PWM dynamic DAC register. (See Section
K
.)
*
BDDAC
(8 bits)+
DBRM
(4 bits): 12-bit PWM/BRM dynamic DAC register. (See Section
K
.)
*
SDAC0
SDAC13
: 8 bits, 8-bit PWM static DAC register. (See Section
K
.)
*
BSDAC0
(8 bits)+
SBRM0
(4 bits): 12-bit PWM/BRM static DAC register. (See Section
K
.)