參數(shù)資料
型號: VSP2265
英文描述: 10-Bit. 25 Msps CCD Signal Processor for Digital Cameras with V/H Timing Generator
中文描述: 10位。 25 Msps的CCD信號處理器為數(shù)碼相機與V /小時時序發(fā)生器
文件頁數(shù): 32/87頁
文件大小: 1303K
代理商: VSP2265
Serial Interface Timing Specification
29
SLES056
December 2002
VSP2265
3
Serial Interface Timing Specification
tXS
tCKH
tCKL
tCKP
tXH
tDS
tDH
MSB
LSB
2 Bytes
SLOAD
SCLK
SDATA
PARAMETER
MIN
100
40
40
30
30
30
30
TYP
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
tCKP
tCKH
tCKL
tDS
tDH
tXS
tXH
Clock period
Clock high-pulse duration
Clock low-pulse duration
Data setup time
Data hold time
SLOAD to SCLK setup time
SCLK to SLOAD hold time
A data shift operation should decode at the rising edge of SCLK while SLOAD is LOW. At the rising edge of
SLOAD, 2 bytes of input data are loaded into the parallel latch in the VSP2265.
When the input serial data is longer than 2 bytes (16 bits), the last 2 bytes become effective and the previous
bits are lost.
SD15
MSB
SD14
SD13
SD12
SD11
SD10
LSB
SD9
MSB
SD8
SD7
SD6
SD5
SD4
SD3
SD2
SD1
SD0
LSB
A5
A4
A3
A2
A1
A0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Register address (default)
Register data (default value)
Serial data for the AFE is applied to the operation at every ADCCK edge (address 000000 to 000011).
Serial data input for the TG should be made when the CCD operation is changed.
Serial data for the TG is applied to operation 1 H before every readout. (CCD) starting point (address 000100
to 011000).
Horizontal Transfer
CCD
READOUT
SERIAL DATA is
Applied to Operation
SERIAL DATA is
Applied to Operation
SOUT
HD
Serial data output, starting from address 000000, occurs during CCD readout.
CCD
READOUT
Horizontal Transfer
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