參數(shù)資料
型號(hào)： uPD720114GA-YEU-A
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT
中文描述： 馬鞍山集成電路
文件頁(yè)數(shù)： 24/32頁(yè)
文件大?。?/td> 269K
代理商： UPD720114GA-YEU-A
Data Sheet S17462EJ4V0DS
24
μ
PD720114
Figure 2-12. Hub EOP Delay and EOP Skew
t
EOP-
t
EOP+
t
EOP-
t
EOP+
t
EOP-
t
EOP+
C. Upstream EOP Delay with or without Cable
Upstream
End of
Cable
Upstream
Port of Hub
Downstream
Port of Hub
Downstream
Port of Hub
Downstream
Port of Hub
Upstream Port
or
End of Cable
A. Downstream EOP Delay with Cable
B. Downstream EOP Delay without Cable
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
50% Point of
Initial Swing
Crossover
Point
Extended
Crossover
Point
Extended
Crossover
Point
Extended
EOP Delay:
t
FEOPD
= t
EOPy
t
HDDx
(t
EOPy
means that this equation applies to t
EOP-
and t
EOP+
)
EOP Skew:
t
FHESK
= t
EOP+
t
EOP-
Low-speed timings are determined in the same way for:
t
LEOPD
and t
LHESK
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