參數(shù)資料
型號(hào)： UCB1500
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 總線(xiàn)控制器
英文描述： PCI to AC97 bridge/host controller
中文描述： PCI BUS CONTROLLER, PQFP80
封裝： 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80
文件頁(yè)數(shù)： 18/58頁(yè)
文件大?。?/td> 1001K
代理商： UCB1500
Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
18 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
[82]: Power Management Capabilities (read only)
Table 22: Power Management Capabilities register bit description
Read only
Bit
Description
15-11(r)
PME support
This 5-bit field indicates the power states in which the function may assert PME.
Value is set to 00000b to indicate no PME can be asserted.
The entire setting can be overwritten by BIOS via writing to 6Ah, or an external
EEPROM. If V
AUX_AV
= 0, bit 15 shall always be zero. If V
AUX
= 1, bit 15 shall
reflect the setting of 6Ah, or that loaded from EEPROM.
10(r)
D2 support
This bit is set to ‘1’ to indicate that function supports the D2 power management
state. This setting can be overwritten by BIOS via 6Ah, or with the external
EEPROM.
9(r)
D1 support
This bit is set to ‘0’ to indicate that function does not support the D1 power
management state. This setting can be overwritten by BIOS via 6Ah, or with the
external EEPROM.
8-6(r)
Aux_Current
These bits are set to ‘0’ for PCI-PM 1.0 compliance. For PCI-PM 1.1 compliance,
these bits are overwritten by BIOS via 6Ah, or loaded from an external EEPROM
to reflect the 3.3V
AUX
current requirement.
5(r)
DSI
The Device Specific Initialization bit indicates whether special initialization of this
function is required (beyond the standard PCI configuration header) before the
generic class device driver is able to use it. This register is set to ‘0’ to indicate
that it does not require special initialization.
4(r)
Reserved.
3(r)
PME Clock
This bit is a ‘0’, indicating that the function does not rely on the presence of the
PCI clock for PME operation.
2:0(r)
Version
This register is set to 001b, indicating that this function complies with Rev 1.0 of
the PCI Power Management Interface Specification These bits can also be
overwritten by BIOS via 6Ah, or loaded from an external EEPROM to 010b for
compliance with PCI-PM 1.1.
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