參數資料
型號: TSB42AA9I
廠商: Texas Instruments, Inc.
英文描述: STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS
中文描述: STORAGELYNX 1394鏈路層的ATA控制器/ ATAPI儲存產品
文件頁數: 38/183頁
文件大小: 798K
代理商: TSB42AA9I
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313
In
multistream
mode multiple data streams can be routed through a single
high-speed data interface
into
different internal buffers. A three-bit buffer address is externally supplied on the
HSDIx_A[2:0] pins
.
For both
transmit and receive operations
,
this address is synchronous to the eight-bit
HSDIx_D[7:0]
. This address
determines which buffer is accessed. The data must be written as complete packets. Different data types
can not be mixed within packet boundaries.
The data streams on a single HSDI port can be of a different nature. For example, an asynchronous data
stream can be routed to buffer 0, and two MPEG streams can be routed to buffer 1 and 2 respectively. The
stream type is indicated by the buffer that is being addressed and the associated configuration.
This mode has been verified in design simulation only.
3.2.2.2
Single-Stream Mode (default mode)
The HSDI can be lined to a single transmit and signal receive buffer. The HSDIx_RW signal determines
which buffer is accessed. Figure 314 shows an example for an application that operates both
high-speed
data interfaces
in
single-stream transmit mode
. In this example the two
HSDI
modules are connected to
external devices that supply a single type of data stream each. The two data streams are routed into two
different transmit buffers.
Set Top Box
HSDIB
HSDIA
Graphics
Engine
MPEG2
Demux
Buffer
4
Buffer
0
HCDB
TSB42AA4/TSB42AB4
Figure 314.
HSDI
Single-Stream Mode Example
When operated in transmit mode, the targeted transmit FIFO is programmed in a CFR. All of the data
presented to the HSDI interface is routed to this buffer. No externally supplied
HSDIx_A[2:0]
lines are
needed.
When operated in receive mode, the targeted receive buffer is programmed in a CFR. The interface outputs
only data received in this buffer. The HSDIx_A[2:0] lines are not driven.
In single-stream mode, each HSDI can receive one stream and transmit one stream. The HSDIx_RW signal
is used to determine which buffer is accessed.
3.2.3
Data Block Synchronization Modes
The HSDI ports also allow the user to select between three different modes of identifying boundaries of data
blocks when reading or writing to the HSDI ports. The synchronization mode is defined in the HSDI
configuration registers. One mode can be defined per HSDI.
Data block boundaries are defined as the first and last bytes of a block of data that is input to or output from
the HSDI port. Boundaries must be known by the link layer for several reasons; in order to determine when
to insert a time stamp for MPEG2 type data, to distinguish between separate data blocks in a given transmit
or receive FIFO, and to know when to add the 1394 header information and begin transmitting. Similar
boundary considerations exist when reading data from the HSDI. Table 36 categorizes the synchronization
modes.
相關PDF資料
PDF描述
TSB42AA9IPZT STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS
TSB42AB4I IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AB4PGE IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB43AA82A1 1394 integrated PHY and link layer controller(1394集成PHY和鏈路層控制器)
TSB81BA3I IEEE 1394b THREE-PORT CABLE TRANSCEIVER/ARBITER
相關代理商/技術參數
參數描述
TSB42AA9IPZT 功能描述:IC 1394 STORAGELYNX 100-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
TSB42AA9PZT 制造商:Rochester Electronics LLC 功能描述:- Bulk
TSB42AA9PZTR 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel
TSB42AB4 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AB4I 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER