參數(shù)資料
型號(hào)： TSB21LV03BI
廠(chǎng)商： Texas Instruments, Inc.
英文描述： IEEE 1394-1995 Triple-Cable Transceiver/Arbiter(IEEE1394-1995 三電纜收發(fā)器/判優(yōu)器)
中文描述： 電機(jī)及電子學(xué)工程師聯(lián)合會(huì)1394-1995三線(xiàn)收發(fā)器/仲裁器（IEEE1394連接- 1995三電纜收發(fā)器/判優(yōu)器）
文件頁(yè)數(shù)： 20/25頁(yè)
文件大?。?/td> 351K
代理商： TSB21LV03BI
TSB21LV03BI
IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
SGLS108 – FEBRUARY 1999
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
00
01
01
01
00
00
Phy
CTL0, CTL1
00
S[0,1]
00
00
Phy
D0, D1
S[2,3]
S[14,15]
Figure 7. Status Transfer Timing
Transmit
When the LLC wants to transmit information, it first requests access to the bus through the LREQ terminal. Once
the phy receives this request, it arbitrates to gain control of the bus. When the phy wins ownership of the serial
bus, it grants the bus to the LLC by asserting the transmit state on the CTLn terminals for at least one SYSCLK
cycle, followed by idle for one clock cycle. The LLC takes control of the bus by asserting either hold or transmit
on the CTLn terminals. Hold is used by the LLC to keep control of the bus when it needs some time to prepare
the data for transmission. The phy keeps control of the bus for the LLC by asserting a data-on state on the bus.
It is not necessary for the LLC to use hold when it is ready to transmit as soon as bus ownership is granted.
When the LLC is prepared to send data, it asserts the transmit state on the CTLn terminals as well as sending
the first bits of the packet on the D0 – D3 lines (assuming 200 Mbits/s). The transmit state is held on the CTLn
terminals until the last bits of data have been sent. The LLC then asserts an idle state on the CTLn terminals
for one clock cycle after which it releases control of the interface.
However, there are times when the LLC needs to send another packet without releasing the bus. For example,
the LLC may want to send consecutive isochronous packets or it may want to attach a response to an
acknowledgment. To do this, the LLC asserts a hold state instead of an idle state when the first packet of data
has been completely transmitted. In this case, hold informs the phy that the LLC needs to send another packet
without releasing control of the bus. The phy then waits a set amount of time before asserting a transmit state.
The LLC can then proceed with the transmittal of the second packet. After all data has been transmitted and
the LLC has asserted an idle state on the CTLn terminals, the phy asserts its own idle state on the CTLn
terminals. When sending multiple packets in this fashion, it is required that all data be transmitted at the same
speed. This is required because the transmission speed is set during arbitration, and since the arbitration step
is skipped, there is no way of informing the network of a change in speed.
相關(guān)PDF資料
PDF描述
TSB42AA4I IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AA4PDT IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AA4PGE IEEE 1394 A CONSUMER ELECTRONICS LINK LAYER CONTROLLER
TSB42AA9I STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS
TSB42AA9IPZT STORAGELYNX 1394 LINK-LAYER CONTROLLER FOR ATA/ATAPI STORAGE PRODUCTS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSB21LV03C 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
TSB21LV03CHV 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
TSB21LV03CMHV 制造商:Rochester Electronics LLC 功能描述:- Bulk
TSB21LV03CMHVB 制造商:Rochester Electronics LLC 功能描述:- Bulk
TSB21LV03CPM 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
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