參數(shù)資料
型號(hào): TPS2306EVM-001
廠商: Texas Instruments, Inc.
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: TPS2306 Dual Sequencing Hot Swap Power Manager Evaluation Module and Interface Card(雙序列熱交換電源管理器件TPS2306的評(píng)估板與接口卡)
中文描述: TPS2306熱插拔雙測序電源管理評(píng)估模塊和接口卡(雙序列熱交換電源管理器件TPS2306的評(píng)估板與接口卡)
文件頁數(shù): 14/19頁
文件大?。?/td> 462K
代理商: TPS2306EVM-001
SLUU094
14
TPS2306 Dual Sequencing Hot Swap Power Manager
4.2
Modifying Load Characteristics
Values of load capacitance other than those supplied can be simulated by removing capacitors C15 and C16
(EVM Channel 1) and C17 and C18 (EVM Channel 2) and replacing them with the appropriate values to
represent the user
s application. Alternatively, the user
s test loads can be connected via banana jacks J1
through J3.
NOTE:
If connecting loads to the EVM outputs, use appropriately rated loads for the anticipated
power dissipation when the EVM outputs are ON.
When the load characteristics are modified, the fault timer setting may need to be adjusted accordingly. Please
refer to the TPS2306 device data sheet for complete details on determining a value for the timing capacitance
according to the load type and value. Once the applicable capacitor value is known, it may be possible to
approximate it on the EVM using poles 3 and 4 of S1 to switch capacitors C11
C13 in and out of the circuit.
If not, these component PCB patterns, and also the C14 slot, are available for installation of user
selected
capacitors. The component lands are sized for EIA 1206-packaged devices.
4.3
Changing the Output Sequencing
As supplied from the factory, the TPS2306 EVM board is configured to ramp Channel 1 up first and down last,
with respect to the Channel 2 output. For the TPS2306 device, sequencing can be easily programmed with the
use of resistive dividers on the two channel outputs, or to other control inputs. Additional circuitry has been laid
out on the EVM module for the installation of SMD jumpers and resistors as required to program alternate output
sequences. See Table 8 below for EVM setup details to obtain various sequencing options.
Table 8. TPS2306 EVM Output Sequence Programming
RAMP
UP
SEQUENCE
RAMP
DOWN
SEQUENCE
R6
R9
R18
R23
R12
R13
R19
R24
(2)
1,2
2,1
1k
NI
0
NI
NI
0
X
0
1,2
1,2
1k
NI
0
NI
0
X
0
NI
2,1
1,2
NI
0
NI
1k
0
X
0
NI
2,1
2,1
NI
0
NI
1k
NI
0
X
0
Track
1. Key to table entries:
NI = not installed
X = don
t care
2. Default (factory) configuration
X
1k
NI
NI
1k
0
X
X
0
NOTES:
In addition to the sequencing order, the relative ramp-up and ramp-down timing between the two channels can
be modified from the default settings. Resistors R8 (for Channel 1) and R20 (for Channel 2) can be changed
to adjust the threshold at which the controlled channel begins to ramp up when its turnon condition is a function
of the other channel
s output status. The value of R8 or R20 (R
ONB
in the equation below) is given by equation 1.
VUP
VRAMP
RONB
VUP
RONA
Where:
V
UP
= the UPx comparator reference voltage, nominally 1.5 V
V
RAMP
= desired output voltage of the primary channel at which the secondary channel should be ramped
up
R
ONA
= the top leg of the resistor divider, R7 or R17
(1)
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