參數(shù)資料
型號： TMS320LC542-40
元件分類： 數(shù)字信號處理
英文描述： Digital Signal Processor
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 91/111頁
文件大?。?/td> 1426K
代理商： TMS320LC542-40
TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
91
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
serial port transmit timing
switching characteristics over recommended operating conditions for serial port transmit with
external clocks and frames (see Figure 33)
PARAMETER
’C54x-40
’LC54x-40
’LC54x-50
’54x-66
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
td(DX)
th(DX)
tdis(DX)
Delay time, DX valid after CLKX rising
25
25
25
ns
Hold time, DX valid after CLKX rising
–5
–5
– 5
ns
Disable time, DX after CLKX rising
40
40
40
ns
timing requirements for serial port transmit with external clocks and frames [H = 0.5t
c(CO)
]
(see Figure 33)
’C54x-40
’LC54x-40
’LC54x-50
’54x-66
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
tc(SCK)
td(FSX)
th(FSX)
th(FSX)H
tf(SCK)
tr(SCK)
tw(SCK)
The serial port design is fully static and, therefore, can operate with tc(SCK) approaching
∞
. It is characterized approaching an input frequency
of 0 Hz but tested at a much higher frequency to minimize test time.
If the FSX pulse does not meet this specification, the first bit of serial data is driven on DX until the falling edge of FSX. After the falling edge of
FSX, data is shifted out on DX pin. The transmit buffer-empty interrupt is generated when the th(FSX) and th(FSX)H specification is met.
NOTE 1: Internal clock with external FSX and vice versa are also allowable. However, FSX timings to CLKX always are defined depending on
the source of FSX, and CLKX timings always are dependent upon the source of CLKX. Specifically, the relationship of FSX to CLKX
is independent of the source of CLKX.
Cycle time, serial port clock
6H
6H
6H
ns
Delay time, FSX after CLKX rising edge
2H–8
2H–5
2H–5
ns
Hold time, FSX after CLKX falling edge (see Note 1)
7
6
6
ns
Hold time, FSX after CLKX rising edge (see Note 1)
2H–8
2H–5
2H–5
ns
Fall time, serial port clock
6
6
6
ns
Rise time, serial port clock
6
6
6
ns
Pulse duration, serial port clock low/high
3H
3H
3H
ns
DX BIT
FSX
CLKX
8/16
7/15
2
1
th(DX)
td(DX)
tw(SCK)
tw(SCK)
tc(SCK)
td(FSX)
th(FSX)H
th(FSX)
tdis(DX)
tr(SCK)
tf(SCK)
Figure 33. Serial Port Transmit Timing With External Clocks and Frames
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相關代理商/技術參數(shù)
參數(shù)描述
TMS320LC542PBK1-50 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320LC542PBK2-50 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320LC542PGE1-40 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320LC542PGE1-50 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
TMS320LC542PGE2-40 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
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