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參數(shù)資料
| 型號： | TMS320LC542-40 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Digital Signal Processor |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 28/111頁 |
| 文件大小： | 1426K |
| 代理商： | TMS320LC542-40 |
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TMS320C54x, TMS320LC54x, TMS320VC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999
28
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
bootloader (continued)
The bootloader provided in the on-chip ROM of the ’548 and ’549 devices implements several enhanced
features. These include the addition of BSP and TDM boot modes. To accommodate these new boot modes,
the encoding of the boot-mode selection word has been modified.
For a detailed description of bootloader functionality, refer to the TMS320C54x DSP Reference Set, Volume 4:
Applications Guide (literature number SPRU173). For a detailed description of the enhanced bootloader
functionality, refer to the TMS320x548/’549 Bootloader Technical Reference
on-chip peripherals
All the ’54x devices have the same CPU structure; however, they have different on-chip peripherals connected
to their CPUs. The on-chip peripheral options provided are:
Software-programmable wait-state generator
Programmable bank switching
Parallel I/O ports
Serial ports (standard, TDM, and BSP)
A hardware timer
A clock generator [with a multiple phase-locked loop (PLL) on ’549 devices]
software-programmable wait-state generators
Software-programmable wait-state generators can be used to extend external bus cycles up to seven machine
cycles to interface with slower off-chip memory and I/O devices. The software wait-state generators are
incorporated without any external hardware. For off-chip memory access, a number of wait states can be
specified for every 32K-word block of program and data memory space, and for one 64K-word block of I/O
space within the software wait-state (SWWSR) register.
programmable bank-switching
Programmable bank-switching can be used to insert one cycle automatically when crossing memory-bank
boundaries inside program memory or data memory space. One cycle can also be inserted when crossing from
program-memory space to data-memory space (’54x) or one program memory page to another program
memory page (’548 and ’549 only). This extra cycle allows memory devices to release the bus before other
devices start driving the bus; thereby avoiding bus contention. The size of memory bank for the bank-switching
is defined by the bank-switching control register (BSCR).
parallel I/O ports
Each ’54x device has a total of 64K I/O ports. These ports can be addressed by the PORTR instruction or the
PORTW instruction. The IS signal indicates a read/write operation through an I/O port. The devices can
interface easily with external devices through the I/O ports while requiring minimal off-chip address-decoding
circuits.
host-port interface (’542, ’545, ’548, and ’549 only)
The host-port interface (HPI) is an 8-bit parallel port used to interface a host processor to the DSP device.
Information is exchanged between the DSP device and the host processor through on-chip memory that is
accessible by both the host and the DSP device. The DSP devices have access to the HPI control (HPIC)
register and the host can address the HPI memory through the HPI address register (HPIA). HPI memory is a
2K-word DARAM block that resides at 1000h to 17FFh in data memory and can also be used as
general-purpose on-chip data or program DARAM.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320LC542PBK1-50 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320LC542PBK2-50 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320LC542PGE1-40 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320LC542PGE1-50 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320LC542PGE2-40 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
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