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參數(shù)資料
| 型號： | TDA9105 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Deflection Processor for Multisync Monitors(偏轉(zhuǎn)處理器) |
| 中文描述： | 偏轉(zhuǎn)處理器的多頻顯示器（偏轉(zhuǎn)處理器） |
| 文件頁數(shù)： | 17/32頁 |
| 文件大?。?/td> | 339K |
| 代理商： | TDA9105 |
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H Osc
Sawtooth
H Drive
1.6V
4V
6.4V
0.75T
0.25T
Ts
Duty Cycle
Internally
Shaped Flyback
Flyback
9
The duty cycle of H-drive is adjustable between 30% and 50%.
Figure 13 :
PLL2Timing Diagram
20k
Q1
GND 0V
5
HFLY
400
9
Figure 14 :
Flyback Input Electrical Diagram
OPERATINGDESCRIPTION
(continued)
PLL2
The PLL2 ensures a constant position of the
shaped flyback signalin comparison with the saw-
tooth of theVCO (seeFigure 13).
The phase comparator of PLL2 is followed by a
charge pump with a
±
0.5mA(typ.) outputcurrent.
TheflybackinputiscomposedofanNPNtransistor.
This input has to be current driven.
The maximum recommanded inputcurrent is 2mA
(seeFigures 14 and 15).
C Lockdet
LOCKDET
COMP1
INPUT
INTERFACE
CHARGE
PUMP
PLL
INHIBITION
Horizontal
Adjust
15
VCO
PHASE
ADJUST
PLL1INHIB
R0 C0
11 10
Filter
12
High
Low
E2
3.2V
OSC
COMP2
CHARGE
PUMP
High
Low
RAP
CYC
EN
Adjust
Rapcyc
4
Cap
PHi2
3
PWM
LOGI
PWM
BUFFER
FLYBACK
SortCOLL
Flyback
SortEM
VB
VA
Horizontal
Input
13
14
17
5
21
20
HLOCKOUT
2
4V
9
Figure 15 :
DualPLL Block Diagram
TDA9105
17/32
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PDF描述 |
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| TDA9106A | LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9105A | 制造商:Panasonic Industrial Company 功能描述:IC |
| TDA9106 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
| TDA9106A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
| TDA9108 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:MONITOR HORIZONTAL PROCESSOR |
| TDA9109 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS |
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