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參數(shù)資料
| 型號： | TDA9105 |
| 廠商： | 意法半導體 |
| 英文描述： | Deflection Processor for Multisync Monitors(偏轉處理器) |
| 中文描述： | 偏轉處理器的多頻顯示器（偏轉處理器） |
| 文件頁數(shù)： | 14/32頁 |
| 文件大?。?/td> | 339K |
| 代理商： | TDA9105 |
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OPERATINGDESCRIPTION
GENERAL CONSIDERATIONS
Power Supply
The typicalvalue of the power supply voltage V
CC
is 12V.Perfectoperationis obtainedif V
CC
ismain-
tained in the limits : 10.8V
→
13.2V.
In order to avoid erratic operation of the circuit
during the transientphase of V
CC
switchingon, or
switching off, thevalue ofV
CC
ismonitoredandthe
outputs of the circuit are inhibited if V
CC
< 7.6 typi-
cally.
In ordertohaveaverygoodpowersupplyrejection,
the circuitis internally poweredby severalinternal
voltage references (The unique typical value of
which is 8V). Two of these voltage referencesare
externallyaccessible, one for the verticalpart and
one for the horizontal part. These voltage refer-
ences can be used for the DC control voltages
applied onthe concernedpinsby the wayof poten-
tiometers or digital to analog converters (DAC’s).
Furthermoreitisnecessaryto filterthea.m.voltage
references by the use of external capacitor con-
nected to ground, in order to minimize the noise
and consequentlythe ”jitter” on vertical and hori-
zontal output signals.
DC Control Adjustments
The circuithas10adjustmentcapabilities:2forthe
horizontal part, 2 for the E/W correction, 4 for the
vertical part, 2 for the Dynamic Horizontal phase
control.
The corresponding inputs of the circuit has to be
driven with a DC voltage typically comprised be-
tween 2 and 6V for a value of the internal voltage
referenceof 8V.
PWM
DAC
Output
DCControl
Voltage
V
REF
9
Figure 5 :
Example of Practical DC Control
Voltage Generation
9
Figure 7
H-SYNC
1.6V
9
Figure 6 :
Input Structure
In order to have a good tracking with the voltage
reference value, it’s better to maintain the control
voltages between V
REF
/4 and 3/4
V
REF
.
The input current of the DC control inputs is typi-
cally very low (about a few
μ
A). Depending on the
internalstructure of the inputs, it can be positive or
negative(sink or source).
HORIZONTAL PART
Input section
The horizontal input is designed to be sensitive to
TTLsignalstypically comprised between 0and 5V.
Thetypical thresholdofthisinputis 1.6V.Thisinput
stageuses an NPN differentialstage and the input
currentis very low.
Concerning the duty cycle of the input signal, the
followingsignals may be appliedto the circuit.
Using internal integration, both signals are recog-
nized onconditionthatZ/T
≤
25%.Synchronisation
occurs on the leading edge of the internal sync
signal. The minimum value of Z is 0.7
μ
s.
PLL1
The PLL1 is composedof a phasecomparator, an
external filter and a Voltage Controlled Oscillator
(VCO).
Thephasecomparatorisa”phasefrequency”type,
designedin CMOS technology.This kindof phase
detector avoids locking on false frequencies. It is
followed by a ”charge pump”, composedof 2 cur-
rent sourcessink and source (I =1mAtyp.)
TDA9105
14/32
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