參數(shù)資料
型號(hào)： TC9324F
廠商： Toshiba Corporation
英文描述： Single-Chip DTS Microcontroller (DTS-20)
中文描述： 單芯片微丘（丘- 20）
文件頁(yè)數(shù)： 86/101頁(yè)
文件大?。?/td> 1831K
代理商： TC9324F
TC9324F
2002-02-08
86
The pulse counter counts up the number of pulses input to the INTR2 pin.
The POL bit sets the count clock edge of the input pin. When POL is set to 0, the pulses are counted on
the falling edge. When POL is set to 1, the pulses are counted on the rising edge. This bit is normally fixed.
The DOWN bit sets the up/down of the 8-bit counter. Setting DOWN to 0 specifies upcount; setting the
bit to 1 specifies downcount. The bit can be freely switched between up and down counting. However, note
that if a clock pulse is input while the bit is being switched, the count is cancelled.
When 2
8
or more pulses are input, the OVER F/F bit is set to 1. To count with 8 bits or higher, use OVER
F/F to detect the overflows, adding or subtracting the number of overflows that occur on data memory.
After an overflow is detected with OVER F/F, set the OVER RESET bit to 1 to reset OVER F/F.
The CTR RESET bit is only used to reset the 8-bit counter. Setting the bit to 1 resets the counter.
The counter data are loaded to data memory in binary format.
Pulse counter control and data loading are accessed by the OUT3/IN3 instruction with the operand [CN
=
BH]. These instructions are located in the DAL address register port. This port can be divided/indirectly
specified and set using the data selection port (
φ
L2B). Set the data of the desired port first, then access the
data port later. The data selection port is incremented by 1 every time the DAL address port (
φ
L3B,
φ
K3B)
is accessed. Accordingly, after setting the data selection port, the data can be repeatedly set.
Note: Switching the POL bit may input a clock pulse. After switching the bit, reset the counter data using the
reset bit.
Note: The data selection port is automatically incremented by 1 at each access of
φ
L2C,
φ
L2D,
φ
L2E,
φ
L2F,
φ
L3B, and
φ
K3B.
2. Pulse Counter Circuit Structure
Note: The pulse counter input is a Schmitt trigger input.
Note: The pulse counter can be used with an interrupt function (INTR2 pin input) at the same time.
3. Example of Pulse Counter Timing
Set data to pulse counter
control bit
Execute
CTR/OVER reset
Set DOWN bit
to 1
Execute
OVER reset
DOWN bit
CTRin input
Counter data
OVER F/F
Minimum pulse width1
μ
s
02H
03H
01H
FFH
00H
01H
02H
N
N
1 N
2
N
+
1
OVER
RESET
DOWN
PC0~PC7
POL
CTR
RESET
To interrupt circuit
PCTRin (INTR2)
69
8-bit up/down counter
F/F
OVER
F/F
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