參數(shù)資料
型號: TC9324F
廠商: Toshiba Corporation
英文描述: Single-Chip DTS Microcontroller (DTS-20)
中文描述: 單芯片微丘(丘- 20)
文件頁數(shù): 36/101頁
文件大?。?/td> 1831K
代理商: TC9324F
TC9324F
2002-02-08
36
2. Interrupt Acceptance Procedure
An interrupt request is held until either the interrupt is accepted or the interrupt latch is reset to 0 by a
system reset or by software. The following describes the interrupt acceptance operation.
1) The peripheral hardware outputs an interrupt request signal if the interrupt conditions are
satisfied and sets the interrupt latch to 1.
2) When the interrupt enable flag for the interrupt source and the master enable flag are set to 1,
the interrupt latch for the accepted interrupt source is reset to 0.
3) The interrupt master enable flag is reset to 0 and the interrupt is disabled.
4) The contents of the stack pointer are decremented by 1.
5) The contents of the program counter are saved to the stack register. At that time, the contents of
the program counter have the address following the address when the interrupt was accepted or
enabled.
6) The contents of the vector address corresponding to the accepted interrupt are loaded to the
program counter.
7) The vector address contents are executed.
Steps (1) to (6) above are executed in one instruction cycle. This instruction cycle is called an interrupt
cycle.
Note: The stack pointer can specify up to 16 stack register levels. The contents of the stack pointer cannot be
refered.
With an interrupt enable period
With an interrupt hold period
Instruction
EI
instruction
Individual
enable
flag set to
1
Interrupt
cycle
IMF
(master enable flag)
interrupt signal
Interrupt signal
IL
(interrupt latch)
EF
(individual enable flag)
One instruction cycle
Interrupt enable period
Interrupt accepted
Interrupt handling
routine
Instruction
EI
instruction
Individual
enable
flag set to
1
Interrupt
cycle
IMF
(master enable flag)
interrupt signal
Interrupt signal
IL
(interrupt latch)
EF
(individual enable flag)
Interrupt hold period
Interrupt accepted
Interrupt handling
routine
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