參數(shù)資料
型號： TC9324F
廠商： Toshiba Corporation
英文描述： Single-Chip DTS Microcontroller (DTS-20)
中文描述： 單芯片微丘（丘- 20）
文件頁數(shù)： 22/101頁
文件大?。?/td> 1831K
代理商： TC9324F
TC9324F
2002-02-08
22
I/O Map
(IN (M, C), IN2 (M, C), IN3 (M, C), OUT (M, C), OUT2 (M, C), OUT3 (M, C))
φ
L1
φ
L2
φ
L3
φ
K1
φ
K2
φ
K3
OUT1
OUT2
OUT3
IN1
IN2
IN3
Page 1
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
Y1
Y2
Y4
Y8
I/O control 1
I/O port 1
IF monitor
SI02 decode data
I/O port 1
0
HF
PW
*
FM
-0
-1
-2
-3
-0
-1
-2
-3
BUSY
MANUAL
OVER
0
DCD0
DCD1
DCD2
DCD3
-0
-1
-2
-3
Programmable counter 1
I/O control 2
I/O port 2
IF data 1
SI02 information data 1
I/O port 2
1
P0
P1
P2
P3
-0
-1
-2
-3
-0
-1
-2
-3
F0
F1
F2
F3
INF0
INF1
INF2
INF3
-0
-1
-2
-3
Programmable counter 2
I/O control 3
I/O port 3
IF data 2
SI02 information data 2
I/O port 3
2
P4
P5
P6
P7
-0
-1
-2
-3
-0
-1
-2
-3
F4
F5
F6
F7
INF4
INF5
INF6
INF7
-0
-1
-2
-3
Programmable counter 3
I/O control 4
I/O port 4
IF data 3
SI02 information data 3
I/O port 4
3
P8
P9
P10
P11
-0
-1
-2
-3
-0
-1
-2
-3
F8
F9
F10
F11
INF8
INF9
INF10
INF11
-0
-1
-2
-3
Programmable counter 4
I/O control 5
I/O port 5
IF data 4
SI02 information data 4
I/O port 5
4
P12
P13
P14
P15
-0
-1
-2
-3
-0
-1
-2
-3
F12
F13
F14
F15
INF12
INF13
INF14
INF15
-0
-1
-2
-3
Programmable counter 4
I/O control 6
I/O port 6
IF data 5
SI02 offset/check data 1
I/O port 6
5
P16
*
*
*
-0
-1
-2
-3
-0
-1
-2
-3
F16
F17
F18
F19
CHK0
CHK1
CHK2
CHK3
-0
-1
-2
-3
Reference select
I/O control 7
I/O port 7
SI02 offset/check data 2
I/O port 7
6
R0
R1
R2
P3
-0
-1
-2
-3
-0
-1
-2
-3
CHK4
CHK5
CHK6
CHK7
-0
-1
-2
-3
I/F counter control 1
I/O control 8
I/O port 8
SI02 offset/check data 2
I/O port 8
7
IF2
IF1/
*
IN1
IF1/
IN2
IF2/
-0
-1
-2
-3
-0
-1
-2
-3
CHK8
CHK9
0
0
-0
-1
-2
-3
I/F counter control 2
I/O control 9
I/O port 9
I/O port 9
8
STP
STA/
MANUAL
G0
G1
-0
-1
-2
-3
-0
-1
-2
-3
HOLD
INTR1
INTR2
STOP
F/F
-0
-1
-2
-3
Mute control
I/O control 10
I/O port 10
Mute control
I/O port 10
9
MUTE
I/O-8
POL
HOLD
-0
-1
-2
-3
-0
-1
-2
-3
MUTE
IO1
POL
HOLD
-0
-1
-2
-3
detect
D02 control
I/O port 8 pulled down
Unlock detect
Input port
A
RESET
PN
M0
M1
-0
-1
-2
-3
DAL
(DATA)
→
DA
OT Count
Up
I/O port 8
pulled up
F/F
ENA
IN1
IN2
DAL
0
0
0
Data selection
DAL address/pulse counter control
Data selection
DAL address
B
CA flag
*
*
*
S1
S2
S4
S8
DA0
DA1
DA2
DA3
CA flag
0
0
0
S1
S2
S4
S8
DA0
DA1
DA2
DA3
G-register 1
General-purpdata/segment I/O control
/SEG
Data register 1
G-register 1
Data register 1
C
G0
G1
G2
G3
/SEG
/SEG
/SEG
d0
d1
d2
d3
G0
G1
G2
G3
d0
d1
d2
d3
G-register 2
Segment data 1
Data register 2
G-register 2
Data register 2
D
G4
G5
G6
G7
COM1
COM2
COM3
COM4
d4
d5
d6
d7
G4
G5
G6
G7
d4
d5
d6
d7
Test port 1
Segment data 2
Data register 3
Data register 3
E
#0
#1
#2
#3
COM1
COM2
COM3
COM4
d8
d9
d10
d11
d8
d9
d10
d11
Page
Test port 2
Segment data 3/LCD driver control
Data register 4
Page
Timer
Data register 4
F
Page 2
Page 3
*
#4
COM1
COM2
COM3
COM4
d12
d13
d14
d15
Page 2
Page 3
0
0
2 Hz F/F
10 Hz
100 Hz
500 Hz
d12
d13
d14
d15
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