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TC9324F
2002-02-08
68
The serial interface 2 (SIO2) data port consists of 16-bit information data (
φ
K21 to
φ
K24), 10-bit check
data (
φ
K25 to
φ
K27), 10-bit offset data (
φ
K25 to
φ
K27), and 4-bit decode data (
φ
K20). Of the 26 bits of serial
data, 16 bits are information data and 10 bits are check data. When some of the 26 bits of data are
exclusive OR-ed, as shown in the previous table, they become offset data. When the offset data are special
data (described previously), 1 to 6h and Bh are output as 4-bit decode data. The same port (
φ
K25 to
φ
K27)
is used to read both check data and offset data. The SIO2 data selection bit (
φ
L18P3) is used to select the
data for reading. Setting the bit to 0 reads offset data; setting the bit to 1 reads check data.
To enable a SIO2 operation, set both the SIO
on
bit (
φ
L17P3) and the MOD bit (
φ
L18P3) to 1. Setting the
STA (
φ
L18P3) to 1 resets all 26 bits of shift register. According to the SCK2 pin shift clock, the SI2 pin
input states are successively input to the shift register. The shift clock edge can be switched by the EDGE
bit (
φ
L17P3). Setting EDGE to 0 shifts the data on the rising edge; setting EDGE to 1 shifts the data on the
falling edge. Enabling the SIO2 interrupt at this time triggers the interrupt on the opposite edge to the
shift edge. In addition, the SO-I/O bit can be used to switch serial input pins between SI2 and SO2.
Setting the SO-I/O bit to 0 sets the SI2 pin to a serial data input. Setting the bit to 1 sets the SO2 pin to a
serial data input. Note that when the SI2 pin is selected as a serial input, the SO2 pin becomes a SIO1
serial output pin. Accordingly, Toshiba recommend using the SO2 pin for serial input.
Access the serial interface 2 control data using the OUT1 instruction with the operand [CN
=
7H, 8H] on
I/O map page 3.
5. Serial Interface 2 (SIO2) Structure
Note: When using the SI2 pin for serial input, the SO2 pin is used for the SIO1 serial output. When setting the
SI2 pin to a serial input, set the P4-1 output data to 1 (input state).
Note: Serial input is simultaneously input and shifted to SIO1.
60
59
58
SCK2 pin
SI2 pin
INF15
SIO2 interrupt
INF14
INF13
CHK2
CHK1
CHK0
INF15
CHK3
0 1 2 3
C
C
C
C
4 5 6 7
C
C
C
C
8
C
9
C
I
I
I
I
I
I
I
I
I
10 11 12
I
I
I
I
13
I
14
I
I
0 1 2 3 4 5 6 7 8 9
26 bits of shift register
Decoder
SCK2 (P4-3)
SO2 (P4-2)
SI2 (P4-1)
SOI
Check data
OFS0 to OFS9 (offset data)
edge
15
Information data
SIO interrupt
DEC0 to DEC3
(decode data)
EXOR circuit for detecting offset data